SAK-C164CI-8E25M DB Infineon Technologies, SAK-C164CI-8E25M DB Datasheet - Page 58
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SAK-C164CI-8E25M DB
Manufacturer Part Number
SAK-C164CI-8E25M DB
Description
IC MCU 16BIT 64KB OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C164CI-8EM_CB.pdf
(79 pages)
Specifications of SAK-C164CI-8E25M DB
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
ASC, CAN, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
59
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
K164CI8E25MDBNP
K164CI8E25MDBXP
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDBIN
SAKC164CI8E25MDBX
SP000104057
K164CI8E25MDBXP
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDBIN
SAKC164CI8E25MDBX
SP000104057
AC Characteristics
External Clock Drive XTAL1
(Operating Conditions apply)
Table 12
Parameter
Oscillator period
High time
Low time
Rise time
Fall time
1)
2)
3)
Figure 13
Note: If the on-chip oscillator is used together with a crystal, the oscillator frequency is
Data Sheet
The minimum and maximum oscillator periods for PLL operation depend on the selected CPU clock generation
mode. Please see respective table above.
The clock input signal must reach the defined levels
The minimum high and low time refers to a duty cycle of 50%. The maximum operating freqency (
drive mode depends on the duty cycle of the clock input signal.
limited to a range of 4 MHz to 16 MHz.
It is strongly recommended to measure the oscillation allowance (or margin) in the
final target system (layout) to determine the optimum parameters for the oscillator
operation. Please refer to the limits specified by the crystal supplier.
When driven by an external clock signal it will accept the specified frequency
range. Operation at lower input frequencies is possible but is guaranteed by
design only (not 100% tested).
2)
2)
2)
2)
0.5
External Clock Drive Characteristics
External Clock Drive XTAL1
V
DD
Symbol
t
t
t
t
t
OSC
1
2
3
4
SR 40
SR 20
SR 20
SR –
SR –
t
1
min.
Direct Drive
3)
3)
1:1
–
8
8
max.
–
–
54
t
V
2
IL2
min.
20
6
6
–
–
and
Prescaler
V
t
t
OSC
IH2
3
2:1
.
max.
–
–
–
5
5
min.
60
10
10
–
–
1)
t
4
MCT02534
PLL
1:N
V
V
IH2
IL
max.
500
–
–
10
10
C164CL/SL
V2.0, 2001-05
C164CI/SI
1)
f
CPU
) in direct
Unit
ns
ns
ns
ns
ns