MC908AZ60AVFUR2 Freescale Semiconductor, MC908AZ60AVFUR2 Datasheet - Page 163

IC MCU 61K FLASH 8.4MHZ 64-QFP

MC908AZ60AVFUR2

Manufacturer Part Number
MC908AZ60AVFUR2
Description
IC MCU 61K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ60AVFUR2

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MC908AZ60AVFUR2TR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AZ60AVFUR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 15
Computer Operating Properly (COP)
15.1 Introduction
The COP module contains a free-running counter that generates a reset if allowed to overflow. The COP
module helps software recover from runaway code. Prevent a COP reset by periodically clearing the COP
counter.
15.2 Functional Description
The COP counter is a free-running 6-bit counter preceded by a 12-bit prescaler. If not cleared by software,
the COP counter overflows and generates an asynchronous reset after 2
cycles, depending on the state of the COP long timeout bit, COPL, in the CONFIG-1. When COPL = 0, a
4.9152-MHz crystal gives a COP timeout period of 53.3 ms. Writing any value to location $FFFF before
an overflow occurs prevents a COP reset by clearing the COP counter and stages 4–12 of the SIM
counter.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the COP bit in the reset status
register (RSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ pin is held at V
state, V
15.3 I/O Signals
The following paragraphs describe the signals shown in
Freescale Semiconductor
Hi
on the RST pin disables the COP.
Service the COP immediately after reset and before entering or after exiting
stop mode to guarantee the maximum time before the first COP counter
overflow.
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
NOTE
NOTE
Figure
15-1.
13
– 2
4
Hi
or 2
. During the break
18
– 2
4
CGMXCLK
163

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