SAF-C161PI-L25M CA Infineon Technologies, SAF-C161PI-L25M CA Datasheet - Page 22

• Manufacturer Part Number: SAF-C161PI-L25M CA
• Description: IC MCU 16BIT ROM/LESS MQFP-100-2
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161PI-L25M CA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 3 KB
• Interface Type: ASC, I2C, SSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Packages: PG-MQFP-100
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 3.0 KByte
• A / D Input Lines (incl. Fadc): 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F161PIL25MCAXT; SAF-C161PI-L25MCA; SAF-C161PI-L25MCAINTR; SAF-C161PI-L25MCATR; SAF-C161PI-L25MCATR; SAFC161PIL25MCAXT; SP000014368

Data Sheet
The C161PI also provides an excellent mechanism to identify and to process exceptions
or error conditions that arise during run-time, so-called ‘Hardware Traps’. Hardware
traps cause immediate non-maskable system reaction which is similar to a standard
interrupt service (branching to a dedicated vector table location). The occurence of a
hardware trap is additionally signified by an individual bit in the trap flag register (TFR).
Except when another higher prioritized trap service is in progress, a hardware trap will
interrupt any actual program execution. In turn, hardware trap services can normally not
be interrupted by standard or PEC interrupts.
The following table shows all of the possible exceptions or error conditions that can arise
during run-time:
Table 3
Exception Condition
Reset Functions:
Hardware Reset
Software Reset
Watchdog Timer Overflow
Class A Hardware Traps:
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Class B Hardware Traps:
Undefined Opcode
Protected Instruction Fault
Illegal Word Operand Access
Illegal Instruction Access
Illegal External Bus Access
Reserved
Software Traps:
TRAP Instruction
Hardware Trap Summary
Trap
Flag
NMI
STKOF
STKUF
UNDOPC
PRTFLT
ILLOPA
ILLINA
ILLBUS
20
Trap
Vector
RESET
RESET
RESET
NMITRAP
STOTRAP
STUTRAP
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
[2C
Any
[00’0000
00’01FC
in steps
of 4
Vector
Location
00’0000
00’0000
00’0000
00’0008
00’0010
00’0018
00’0028
00’0028
00’0028
00’0028
00’0028
H
H
– 3C
H
H
H
H
H
H
H
H
H
H
H
H
H
]
H
–
] [0B
0F
Any
[00
7F
Trap
Number
00
00
00
02
04
06
0A
0A
0A
0A
0A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
]
]
–
–
Current
CPU
Priority
&3,
Trap
Prio
III
III
III
II
II
II
I
I
I
I
I
1999-07