SAF-XC164CM-4F40F AA Infineon Technologies, SAF-XC164CM-4F40F AA Datasheet - Page 44
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SAF-XC164CM-4F40F AA
Manufacturer Part Number
SAF-XC164CM-4F40F AA
Description
IC MCU 16BIT FLASH TQFP-64-8
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet
1.SAF-XC164CM-4F20F_AA.pdf
(70 pages)
Specifications of SAF-XC164CM-4F40F AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Data Converters
A/D 14x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
2xASC, 2xSSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
47
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
For Use With
B158-H8961-X-X-7600IN - KIT EASY XC164CMXC164CMUCANIN - KIT U-CAN STARTER XC164CMMCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
FX164CM4F40FAAXT
SAF-XC164CM-4F40FAA
SAF-XC164CM-4F40FAAINTR
SAF-XC164CM-4F40FAATR
SAF-XC164CM-4F40FAATR
SAFXC164CM4F40FAAXT
SP000084410
SAF-XC164CM-4F40FAA
SAF-XC164CM-4F40FAAINTR
SAF-XC164CM-4F40FAATR
SAF-XC164CM-4F40FAATR
SAFXC164CM4F40FAAXT
SP000084410
XC164CM
Derivatives
Functional Description
3.15
Clock Generation
The Clock Generation Unit uses a programmable on-chip PLL with multiple prescalers
f
to generate the clock signals for the XC164CM with high flexibility. The master clock
MC
is the reference clock signal, and is used for TwinCAN and is output to the external
f
f
system. The CPU clock
and the system clock
are derived from the master clock
CPU
SYS
f
f
f
either directly (1:1) or via a 2:1 prescaler (
=
=
/ 2). See also
Section
4.4.1.
SYS
CPU
MC
The on-chip oscillator can drive an external crystal or accepts an external clock signal.
The oscillator clock frequency can be multiplied by the on-chip PLL (by a programmable
factor) or can be divided by a programmable prescaler factor.
If the bypass mode is used (direct drive or prescaler) the PLL can deliver an independent
clock to monitor the clock signal generated by the on-chip oscillator. This PLL clock is
independent from the XTAL1 clock. When the expected oscillator clock transitions are
missing the Oscillator Watchdog (OWD) activates the PLL Unlock/OWD interrupt node
and supplies the CPU with an emergency clock, the PLL clock signal. Under these
circumstances the PLL will oscillate with its basic frequency.
The oscillator watchdog can be disabled by switching the PLL off. This reduces power
consumption, but also no interrupt request will be generated in case of a missing
oscillator clock.
Data Sheet
42
V1.4, 2007-03