M30625FGPGP#U5C Renesas Electronics America, M30625FGPGP#U5C Datasheet - Page 124
M30625FGPGP#U5C
Manufacturer Part Number
M30625FGPGP#U5C
Description
IC M16C MCU FLASH 256K 128LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30625FGPGP#U5C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
128-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
12.2
12.2.1
12.2.2
12.2.3
12.2.4
A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable interrupts.
An undefined instruction interrupt occurs when executing the UND instruction.
An overflow interrupt occurs when executing the INTO instruction with the O flag in the FLG register set to “1”
(the operation resulted in an overflow). The following are instructions whose O flag changes by arithmetic:
ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB
A BRK interrupt occurs when executing the BRK instruction.
An INT instruction interrupt occurs when executing the INT instruction. Software interrupt Nos. 0 to 63 can be
specified for the INT instruction. Because software interrupt Nos. 4 to 31 are assigned to peripheral function
interrupts, the same interrupt routine as for peripheral function interrupts can be executed by executing the INT
instruction.
In software interrupt Nos. 0 to 31, the U flag is saved to the stack during instruction execution and is cleared to
“0” (ISP selected) before executing an interrupt sequence. The U flag is restored from the stack when returning
from the interrupt routine. In software interrupt Nos. 32 to 63, the U flag does not change state during
instruction execution, and the SP then selected is used.
Software Interrupts
Jan 10, 2006
Undefined Instruction Interrupt
Overflow Interrupt
BRK Interrupt
INT Instruction Interrupt
Page 107 of 390
12. Interrupt
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