MC56F8145VFGE Freescale Semiconductor, MC56F8145VFGE Datasheet - Page 96

IC DSP 16BIT 40MHZ 128-LQFP

MC56F8145VFGE

Manufacturer Part Number
MC56F8145VFGE
Description
IC DSP 16BIT 40MHZ 128-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8145VFGE

Core Processor
56800
Core Size
16-Bit
Speed
40MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
128-LQFP
Data Bus Width
16 bit
Processor Series
MC56F81xx
Core
56800E
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
49
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
4 x 12 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.6.10.8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.11
5.6.11.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.11.2
The contents of this register determine the location of the Vector Address Table. The value in this register
is used as the upper 13 bits of the interrupt Vector Address Bus (VAB[20:0]). The lower eight bits are
determined based upon the highest-priority interrupt. They are then appended onto VBA before presenting
the full interrupt address to the 56800E core; see
5.6.12
5.6.12.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
96
Base + $A
Base + $B
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
RESET
RESET
Write
Write
Read
Read
Vector Base Address Register (VBA)
Fast Interrupt 0 Match Register (FIM0)
ADC B Conversion Complete Interrupt Priority Level
(ADCB_CC IPL)—Bits 1–0
Reserved—Bits 15–13
Interrupt Vector Base Address (VECTOR BASE ADDRESS)—
Bits 12–0
Reserved—Bits 15–7
15
15
0
0
0
0
Figure 5-14 Fast Interrupt 0 Match Register (FIM0)
Figure 5-13 Vector Base Address Register (VBA)
14
14
0
0
0
0
13
13
0
0
0
0
12
12
0
0
0
56F8345 Technical Data, Rev. 17
11
11
0
0
0
10
10
0
0
0
Part 5.3.1
9
0
9
0
0
8
0
8
0
0
VECTOR BASE ADDRESS
for details.
7
7
0
0
0
6
6
0
0
5
0
5
0
FAST INTERRUPT 0
4
4
0
0
3
3
0
0
Freescale Semiconductor
2
0
2
0
1
0
1
0
Preliminary
0
0
0
0

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