HD64F38024RHV Renesas Electronics America, HD64F38024RHV Datasheet - Page 151

IC H8/SLP MCU FLASH 80QFP

HD64F38024RHV

Manufacturer Part Number
HD64F38024RHV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024RHV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK38076 - DEV EVAL KIT FOR H8/38076
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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5.2.2
Sleep mode is cleared by any interrupt (timer A, timer C, timer F, timer G, asynchronous event
counter, IRQAEC, IRQ
the RES pin.
• Clearing by interrupt
5.2.3
Operation in sleep (medium-speed) mode is clocked at the frequency designated by the MA1 and
MA0 bits in SYSCR1.
When an interrupt is requested, sleep mode is cleared and interrupt exception handling starts.
A transition is made from sleep (high-speed) mode to active (high-speed) mode, or from sleep
(medium-speed) mode to active (medium-speed) mode. Sleep mode is not cleared if the I bit of
the condition code register (CCR) is set to 1 or the particular interrupt is disabled in the
interrupt enable register.
To synchronize the interrupt request signal with the system clock, up to 2/φ(s) delay may occur
after the interrupt request signal occurrence, before the interrupt exception handling start.
When the RES pin goes low, the CPU goes into the reset state and sleep mode is cleared.
Clearing by RES input
Clearing Sleep Mode
Clock Frequency in Sleep (Medium-Speed) Mode
4
, IRQ
3
, IRQ
1
, IRQ
0
, WKP
7
to WKP
Rev. 8.00 Mar. 09, 2010 Page 129 of 658
0
, SCI3, A/D converter), or by input at
Section 5 Power-Down Modes
REJ09B0042-0800

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