M30260F3AGP#U3A Renesas Electronics America, M30260F3AGP#U3A Datasheet - Page 333

• Manufacturer Part Number: M30260F3AGP#U3A
• Description: IC M16C/26A MCU FLASH 24K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F3AGP#U3A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Interface Type: UART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
1
. v
J
6
0
C
19.8.2 Serial I/O (UART Mode)
2
9
0 .
B
2 /
0
0
19.8.1.1 Special Mode 1 (I
19.8.1.2 Special Mode 2
19.8.1.3 Special Mode 4 (SIM Mode)
6
2
A
When generating start, stop and restart conditions, set the STSPSEL bit in the U2SMR4 register to “0”
and wait for more than half cycle of the transfer clock before setting each condition generate bit
(STAREQ, RSTAREQ and STPREQ) from “0” to “1”.
If a low-level signal is applied to the P8
to "1" (three-phase output forcible cutoff by input on SD pin enabled), the P7
U1MAP bit in PACR register is “1”) and CLK
A transmit interrupt request is generated by setting the U2IRS bit in the U2C1 register to “1” (transmis-
sion complete) and U2ERE bit to “1” (error signal output) after reset. Therefore, when using SIM
mode, be sure to clear the IR bit to “0” (no interrupt request) after setting these bits.
0
F
2
e
G
0 -
b
o r
1 .
2
0
u
, 5
0
p
2
(
0
M
0
7
1
6
C
page 314
2 /
6
, A
M
1
f o
6
2
C
3
C bus Mode)
2
2 /
9
6
, B
M
1
6
C
5
/NMI/SD pin when the IVPCR1 bit in the TB2SC register is set
2 /
_______ _____
6
) T
2
pins go to a high-impedance state.
_____
3
/RTS
2
/TxD1(when the
19. Usage Notes