MC9S12C32MFAE25 Freescale Semiconductor, MC9S12C32MFAE25 Datasheet - Page 334
MC9S12C32MFAE25
Manufacturer Part Number
MC9S12C32MFAE25
Description
IC MCU 32K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets
1.MC9S12GC16MFUE.pdf
(690 pages)
2.MC9S12C96CFUER.pdf
(26 pages)
3.MC9S12C32CFAE25.pdf
(2 pages)
Specifications of MC9S12C32MFAE25
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
10.4.4.3
In all emulation modes, the MSCAN module behaves just like normal system operation modes as
described within this specification.
10.4.4.4
In an optional CAN bus monitoring mode (listen-only), the CAN node is able to receive valid data frames
and valid remote frames, but it sends only “recessive” bits on the CAN bus. In addition, it cannot start a
transmision. If the MAC sub-layer is required to send a “dominant” bit (ACK bit, overload flag, or active
error flag), the bit is rerouted internally so that the MAC sub-layer monitors this “dominant” bit, although
the CAN bus may remain in recessive state externally.
10.4.4.5
The MSCAN module has no security features.
10.4.5
If the MSCAN is disabled (CANE = 0), the MSCAN clocks are stopped for power saving.
If the MSCAN is enabled (CANE = 1), the MSCAN has two additional modes with reduced power
consumption, compared to normal mode: sleep and power down mode. In sleep mode, power consumption
is reduced by stopping all clocks except those to access the registers from the CPU side. In power down
mode, all clocks are stopped and no power is consumed.
Table 10-35
modes is entered by the given settings on the CSWAI and SLPRQ/SLPAK bits.
For all modes, an MSCAN wake-up interrupt can occur only if the MSCAN is in sleep mode (SLPRQ = 1
and SLPAK = 1), wake-up functionality is enabled (WUPE = 1), and the wake-up interrupt is enabled
(WUPIE = 1).
334
Low-Power Options
summarizes the combinations of MSCAN and CPU modes. A particular combination of
Emulation Modes
Listen-Only Mode
Security Modes
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
Freescale Semiconductor
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