MC908GZ60CFAE Freescale Semiconductor, MC908GZ60CFAE Datasheet - Page 5

• Manufacturer Part Number: MC908GZ60CFAE
• Description: IC MCU 60K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ60CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/ESCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 24-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision History (Continued)
Freescale Semiconductor
October,
April,
Date
2006
2007
Revision
Level
5.0
6.0
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
12.2 Features — Corrected timer link connection from TIM2 channel 0 to
TIM1 channel 0.
12.9 Timer Link — Corrected timer link connection from TIM2 channel 0 to
TIM1 channel 0.
21.5 5.0-Vdc Electrical Characteristics and
21.6 3.3-Vdc Electrical Characteristics — Updated DC injection current
specification.
Figure 2-2. Control, Status, and Data Registers
TMBCLKSEL to be compatible with development tool nomenclature
Chapter 5 Configuration Register (CONFIG)
CGMXCLK and TBMCLKSEL to TMBCLKSEL to be compatible with
development tool nomenclature
10.6.2 Stop Mode
Figure 14-3. ESCI Module Block Diagram
CLOCK and removed reference to 4xBUSCLK
14.4.2 Transmitter
14.9.1 ESCI Arbiter Control Register
Replaced one quarter with one half in the definition for ACLK = 1
Figure 17-1. Timebase Block
17-1. Timebase Divider Selection
to be compatible with development tool nomenclature
21.9 Clock Generation Module (CGM) Characteristics
include the following:
21.9.1 CGM Operating Conditions
21.9.2 CGM Component Information
21.9.3 CGM Acquisition/Lock Time Information
— Changed COPCLK to CGMXCLK
— Changed ESCIBDSRC to SCIBDSRC
Diagram,
Description
— Changed TBMCLKSEL to TMBCLKSEL
and
17.5 TBM Interrupt
14.9.3 Bit Time Measurement
— Changed BUS_CLK to BUS
— Changed COPCLK to
— Changed TBMCLKSEL to
— Updated section to
Rate, and
Table
—
Number(s)
Page
135
147
317
319
125
192
194
217
218
260
261
322
322
323
37
91
92
93
5