R5F21254SDFP#U0 Renesas Electronics America, R5F21254SDFP#U0 Datasheet - Page 421
![IC R8C MCU FLASH 52LQFP](/photos/12/18/121820/r5f21254sdfp_u0_sml.jpg)
R5F21254SDFP#U0
Manufacturer Part Number
R5F21254SDFP#U0
Description
IC R8C MCU FLASH 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21254SDFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21254SDFP#U0R5F21254SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
19.4
Table 19.3
NOTE:
Operating mode
Areas in which a rewrite
control program can be
located
Areas in which a rewrite
control program can be
executed
Areas which can be
rewritten
Software command
restrictions
Modes after program or
erase
Modes after read status
register
CPU status during auto-
write and auto-erase
Flash memory status
detection
Conditions for transition to
erase-suspend
Conditions for transitions to
program-suspend
CPU clock
In CPU rewrite mode, the user ROM area can be rewritten by executing software commands from the CPU.
Therefore, the user ROM area can be rewritten directly while the MCU is mounted on a board without using a
ROM programmer. Execute the program and block erase commands only to blocks in the user ROM area.
The flash module has an erase-suspend function when an interrupt request is generated during an erase operation in
CPU rewrite mode. It performs an interrupt process after the erase operation is halted temporarily. During erase-
suspend, the user ROM area can be read by a program.
In case an interrupt request is generated during an auto-program operation in CPU rewrite mode, the flash module
has a program-suspend function which performs the interrupt process after the auto-program operation is
suspended. During program-suspend, the user ROM area can be read by a program.
CPU rewrite mode has an erase write 0 mode (EW0 mode) and an erase write 1 mode (EW1 mode). Table 19.3 lists
the Differences between EW0 Mode and EW1 Mode.
1. When the FMR02 bit in the FMR0 register is set to 1 (rewrite enabled), rewriting block 0 is enabled by setting
the FMR15 bit in the FMR1 register to 0 (rewrite enabled), and rewriting block 1 is enabled by setting the
FMR16 bit to 0 (rewrite enabled).
CPU Rewrite Mode
Feb 29, 2008
Item
Differences between EW0 Mode and EW1 Mode
Page 402 of 485
Single-chip mode
User ROM area
Necessary to transfer to any area other
than the flash memory (e.g., RAM) before
executing
User ROM area
None
Read status register mode
Read status register mode
Operating
• Read bits FMR00, FMR06, and FMR07
• Execute the read status register
Set bits FMR40 and FMR41 in the FMR4
register to 1 by a program.
Set bits FMR40 and FMR42 in the FMR4
register to 1 by a program.
5 MHz or below
in the FMR0 register by a program
command and read bits SR7, SR5, and
SR4 in the status register.
EW0 Mode
Single-chip mode
User ROM area
Executing directly in user ROM or RAM
area possible
User ROM area
• Program and block erase commands
• Read status register command
Read array mode
Do not execute this command
Hold state (I/O ports hold state before the
command is executed)
Read bits FMR00, FMR06, and FMR07 in
the FMR0 register by a program
The FMR40 bit in the FMR4 register is set
to 1 and the interrupt request of the
enabled maskable interrupt is generated
The FMR40 bit in the FMR4 register is set
to 1 and the interrupt request of the
enabled maskable interrupt is generated
No restriction (on clock frequency to be
used)
However, blocks which contain a rewrite
control program are excluded
Cannot be run on any block which
contains a rewrite control program
Cannot be executed
EW1 Mode
19. Flash Memory
(1)
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