C8051F702-GQ Silicon Laboratories Inc, C8051F702-GQ Datasheet - Page 93

• Manufacturer Part Number: C8051F702-GQ
• Description: IC 8051 MCU 16K FLASH 64-TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F70xr

Specifications of C8051F702-GQ

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 64-TQFP, 64-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 54
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4 x 16 bit
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1608

SFR Definition 15.9. CS0PM: Capacitive Sense Pin Monitor
SFR Address = 0x9F; SFR Page = F
Name
Reset
Bit
1:0
Type
7
6
5
4
3
2
Bit
CSPMMD[1:0] CS0 Pin Monitor Mode.
SMBPM
PCAPM
CP0PM
PIOPM
UAPM
SPIPM
UAPM
Name
R/W
7
0
SPIPM
UART Pin Monitor Enable.
Enables monitoring of the UART TX pin.
SPI Pin Monitor Enable.
Enables monitoring SPI output pins.
SMBus Pin Monitor Enable.
Enables monitoring of the SMBus pins.
PCA Pin Monitor Enable.
Enables monitoring of PCA output pins.
Port I/O Pin Monitor Enable.
Enables monitoring of writes to the port latch registers.
CP0 Pin Monitor Enable.
Enables monitoring of the comparator CP0 (synchronous) output.
Selects the operation to take when a monitored signal changes state.
00: Always retry bit cycles on a pin state change.
01: Retry up to twice on consecutive bit cycles.
10: Retry up to four times on consecutive bit cycles.
11: Reserved.
R/W
6
0
SMBPM
R/W
5
0
PCAPM
R/W
Rev. 1.0
4
0
Description
PIOPM
R/W
3
0
CP0PM
R/W
C8051F70x/71x
2
0
CSPMMD[1:0]
1
0
R/W
0
0
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