R5F21132FP#U0 Renesas Electronics America, R5F21132FP#U0 Datasheet - Page 48
![IC R8C MCU FLASH 8K 32LQFP](/photos/12/17/121786/r5f21132fp_u0_sml.jpg)
R5F21132FP#U0
Manufacturer Part Number
R5F21132FP#U0
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21132FPU0.pdf
(33 pages)
3.R5F21132FPU0.pdf
(226 pages)
Specifications of R5F21132FP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 48 of 300
- Download datasheet (2Mb)
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Chapter 2 Addressing Modes
R2R0
R3R1
A1A0
INTBL
INTBH
ISP
SP
SB
FB
FLG
Control register direct
32-bit register direct
The 32-bit concatenated register content of two
specified registers is the object of the operation.
This addressing mode can be used with the
SHL, SHA, JMPI, and JSRI instructions.
Valid register and instruction combinations
are as follows.
R2R0, R3R1
A1A0
The specified control register is the
object of the operation.
This addressing mode can be used
with the LDC, STC, PUSHC, and
POPC instructions.
If SP is specified, the stack pointer
indicated by the U flag is the object of
the operation.
page 28 of 263
SHL, SHA, JMPI, and JSRI
instructions
JMPI and JSRI instructions
INTBL
INTBH
ISP
USP
SB
FB
FLG
SHL, SHA instructions
JMPI, JSRI instructions
R2R0
R3R1
R2R0
R3R1
A1A0
b31
PC
b31
2.4 Special Instruction Addressing
b15
b15
b15
b15
b15
b15
b15
b16
b16
b15
Register
b15
b4 b3
b0
b0
b0
b0
b0
b0
b0
b0
b0
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