R5F21122FP#U0 Renesas Electronics America, R5F21122FP#U0 Datasheet - Page 14

• Manufacturer Part Number: R5F21122FP#U0
• Description: IC R8C MCU FLASH 8K 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/12r

Specifications of R5F21122FP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/12 Group
Rev.1.20
REJ03B0068-0120
N O T E S :
X : U n d e f i n e d
Table 4.3 SFR Information(3)
A d d r e s s
1 . B l a n k s p a c e s a r e r e s e r v e d . N o a c c e s s i s a l l o w e d .
0 0 8 0
0 0 8 1
0 0 8 2
0 0 8 3
0 0 8 4
0 0 8 5
0 0 8 6
0 0 8 7
0 0 8 8
0 0 8 9
0 0 8 A
0 0 8 B
0 0 8 C
0 0 8 D
0 0 8 E
0 0 8 F
0 0 9 0
0 0 9 1
0 0 9 2
0 0 9 3
0 0 9 4
0 0 9 5
0 0 9 6
0 0 9 7
0 0 9 8
0 0 9 9
0 0 9 A
0 0 9 B
0 0 9 C
0 0 9 D
0 0 9 E
0 0 9 F
0 0 A 0
0 0 A 1
0 0 A 2
0 0 A 3
0 0 A 4
0 0 A 5
0 0 A 6
0 0 A 7
0 0 A 8
0 0 A 9
0 0 A A
0 0 A B
0 0 A C
0 0 A D
0 0 A E
0 0 A F
0 0 B 0
0 0 B 1
0 0 B 2
0 0 B 3
0 0 B 4
0 0 B 5
0 0 B 6
0 0 B 7
0 0 B 8
0 0 B 9
0 0 B A
0 0 B B
0 0 B C
0 0 B D
0 0 B E
0 0 B F
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
Jan 27, 2006
T i m e r Y , Z m o d e r e g i s t e r
P r e s c a l e r Y r e g i s t e r
T i m e r Y s e c o n d a r y r e g i s t e r
T i m e r Y p r i m a r y r e g i s t e r
T i m e r Y , Z w a v e f o r m o u t p u t c o n t r o l r e g i s t e r
P r e s c a l e r Z r e g i s t e r
T i m e r Z s e c o n d a r y r e g i s t e r
T i m e r Z p r i m a r y r e g i s t e r
T i m e r Y , Z o u t p u t c o n t r o l r e g i s t e r
T i m e r X m o d e r e g i s t e r
P r e s c a l e r X r e g i s t e r
T i m e r X r e g i s t e r
T i m e r c o u n t s o u r c e s e t t i n g r e g i s t e r
T i m e r C r e g i s t e r
E x t e r n a l i n p u t e n a b l e r e g i s t e r
K e y i n p u t e n a b l e r e g i s t e r
T i m e r C c o n t r o l r e g i s t e r 0
T i m e r C c o n t r o l r e g i s t e r 1
C a p t u r e r e g i s t e r
U A R T 0 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
U A R T 0 b i t r a t e r e g i s t e r
U A R T 0 t r a n s m i t b u f f e r r e g i s t e r
U A R T 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0
U A R T 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1
U A R T 0 r e c e i v e b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
U A R T 1 b i t r a t e g e n e r a t o r
U A R T 1 t r a n s m i t b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0
U A R T 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1
U A R T 1 r e c e i v e b u f f e r r e g i s t e r
U A R T t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 2
page 12 of 25
(1)
R e g i s t e r
T Y Z M R
P U M
T Y Z O C
T X M R
I N T E N
K I E N
P R E Y
T Y S C
T Y P R
P R E Z
T Z S C
T Z P R
P R E X
T X
T C S S
T C
T C C 0
T C C 1
T M 0
U 0 M R
U 0 B R G
U 0 T B
U 0 C 0
U 0 C 1
U 0 R B
U 1 M R
U 1 B R G
U 1 T B
U 1 C 0
U 1 C 1
U 1 R B
U C O N
S y m b o l
4. Special Function Register (SFR)
X X
0 0
F F
F F
F F
0 0
F F
F F
F F
0 0
0 0
F F
F F
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
X X
X X
X X
0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0
X X
X X
X X
X X
X X
0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0
X X
0 0
0 0
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
A f t e r r e s e t
2
2
2
2