C8051F500-IQ Silicon Laboratories Inc, C8051F500-IQ Datasheet - Page 4
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C8051F500-IQ
Manufacturer Part Number
C8051F500-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F500-IQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 32 Channel
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1530 - ADAPTER PROG TOOLSTICK F500336-1529 - PLATFORM PROG TOOLSTCK F500336-1527 - KIT DEV FOR C8051F50X336-1526 - BOARD PROTOTYPE W/C8051F500
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1510
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F500-IQ
Manufacturer:
SiliconL
Quantity:
300
Company:
Part Number:
C8051F500-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F500-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F50x-F51x
13. Special Function Registers................................................................................. 100
14. Interrupts .............................................................................................................. 117
15. Flash Memory....................................................................................................... 129
16. Power Management Modes................................................................................. 138
17. Reset Sources ...................................................................................................... 141
18. External Data Memory Interface and On-Chip XRAM ....................................... 147
4
13.1. SFR Paging ................................................................................................... 100
13.2. Interrupts and SFR Paging ............................................................................ 100
13.3. SFR Page Stack Example ............................................................................. 101
14.1. MCU Interrupt Sources and Vectors.............................................................. 117
14.2. Interrupt Register Descriptions ...................................................................... 120
14.3. External Interrupts INT0 and INT1................................................................. 126
15.1. Programming The Flash Memory .................................................................. 129
15.2. Non-volatile Data Storage ............................................................................. 131
15.3. Security Options ............................................................................................ 131
15.4. Flash Write and Erase Guidelines ................................................................. 133
16.1. Idle Mode....................................................................................................... 138
16.2. Stop Mode ..................................................................................................... 139
16.3. Suspend Mode .............................................................................................. 139
17.1. Power-On Reset ............................................................................................ 142
17.2. Power-Fail Reset/VDD Monitor ..................................................................... 142
17.3. External Reset ............................................................................................... 144
17.4. Missing Clock Detector Reset ....................................................................... 144
17.5. Comparator0 Reset ....................................................................................... 145
17.6. PCA Watchdog Timer Reset ......................................................................... 145
17.7. Flash Error Reset .......................................................................................... 145
17.8. Software Reset .............................................................................................. 145
18.1. Accessing XRAM........................................................................................... 147
18.2. Configuring the External Memory Interface ................................................... 148
18.3. Port Configuration.......................................................................................... 148
18.4. Multiplexed and Non-multiplexed Selection................................................... 153
14.1.1. Interrupt Priorities.................................................................................. 118
14.1.2. Interrupt Latency ................................................................................... 118
15.1.1. Flash Lock and Key Functions .............................................................. 129
15.1.2. Flash Erase Procedure ......................................................................... 129
15.1.3. Flash Write Procedure .......................................................................... 130
15.1.4. Flash Write Optimization ....................................................................... 130
15.4.1. V
15.4.2. PSWE Maintenance .............................................................................. 133
15.4.3. System Clock ........................................................................................ 134
18.1.1. 16-Bit MOVX Example .......................................................................... 147
18.1.2. 8-Bit MOVX Example ............................................................................ 147
18.4.1. Multiplexed Configuration...................................................................... 153
18.4.2. Non-multiplexed Configuration.............................................................. 154
12.2.1.3. Stack ............................................................................................ 99
DD
Maintenance and the V
Rev. 1.1
DD
monitor ................................................ 133