EE87C5224SF76 Intel, EE87C5224SF76 Datasheet - Page 4

IC MCU 8BIT 8K 24MHZ OTP 44-PLCC

EE87C5224SF76

Manufacturer Part Number
EE87C5224SF76
Description
IC MCU 8BIT 8K 24MHZ OTP 44-PLCC
Manufacturer
Intel
Series
87Cr
Datasheet

Specifications of EE87C5224SF76

Core Processor
MCS 51
Core Size
8-Bit
Speed
24MHz
Connectivity
SIO
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Other names
864408

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Quantity:
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8XC52 54 58
PIN DESCRIPTIONS
V
V
V
reduce ground bounce and improve power supply
by-passing
This pin is not a substitute for the V
(Connection not necessary for proper operation )
Port 0 Port 0 is an 8-bit open drain bidirectional
I O port As an output port each pin can sink several
LS TTL inputs Port 0 pins that have 1’s written to
them float and in that state can be used as high-im-
pedance inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory In this application it uses strong inter-
nal pullups when emitting 1’s and can source and
sink several LS TTL inputs
Port 0 also receives the code bytes during EPROM
programming and outputs the code bytes during
program verification External pullup resistors are re-
quired during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with
internal pullups The Port 1 output buffers can drive
LS TTL inputs Port 1 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally pulled low will source current
(I
ups
In addition Port 1 serves the functions of the follow-
ing special features of the 8XC5X
Port 1 receives the low-order address bytes during
EPROM programming and verifying
Port 2 Port 2 is an 8-bit bidirectional I O port with
internal pullups The Port 2 output buffers can drive
LS TTL inputs Port 2 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
4
IL
CC
SS
SS1
Port Pin
P1 0
P1 1
on the data sheet) because of the internal pull-
Circuit ground
Supply voltage
Secondary ground (not on DIP) Provided to
T2 (External Count Input to Timer
Counter 2) Clock-Out
T2EX (Timer Counter 2 Capture
Reload Trigger and Direction Control)
Alternate Function
NOTE
SS
pin (pin 22)
pins that are externally pulled low will source current
(I
ups
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
addresses (MOVX
uses strong internal pullups when emitting 1’s Dur-
ing accesses to external Data Memory that use 8-bit
addresses (MOVX
the P2 Special Function Register
Some Port 2 pins receive the high-order address bits
during EPROM programming and program verifica-
tion
Port 3 Port 3 is an 8-bit bidirectional I O port with
internal pullups The Port 3 output buffers can drive
LS TTL inputs Port 3 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 3
pins that are externally pulled low will source current
(I
Port 3 also serves the functions of various special
features of the 8051 Family as listed below
RST Reset input A high on this pin for two machine
cycles while the oscillator is running resets the de-
vice The port pins will be driven to their reset condi-
tion when a minimum V
the oscillator is running or not An internal pulldown
resistor permits a power-on reset with only a capaci-
tor connected to V
ALE Address Latch Enable output pulse for latching
the low byte of the address during accesses to ex-
ternal memory This pin (ALE PROG) is also the
program pulse input during EPROM programming for
the 87C5X
In normal operation ALE is emitted at a constant
rate of
for external timing or clocking purposes Note how-
ever that one ALE pulse is skipped during each ac-
cess to external Data Memory
Port Pin
IL
IL
P3 0
P3 1
P3 2
P3 3
P3 4
P3 5
P3 6
P3 7
on the data sheet) because of the pullups
on the data sheet) because of the internal pull-
the oscillator frequency and may be used
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (Timer 0 external input)
T1 (Timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
CC
Ri) Port 2 emits the contents of
Alternate Function
DPTR) In this application it
IHI
voltage is applied whether

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