C8051F713-GQ Silicon Laboratories Inc, C8051F713-GQ Datasheet - Page 229
![IC 8051 MCU 8K FLASH 48-TQFP](/photos/12/16/121674/c8051f713-gq_sml.jpg)
C8051F713-GQ
Manufacturer Part Number
C8051F713-GQ
Description
IC 8051 MCU 8K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F71xr
Specifications of C8051F713-GQ
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1615
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F713-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F713-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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case, either a 1 or a 0 value are acceptable on the incoming slave address. Additionally, if the GC bit in
register SMB0ADR is set to 1, hardware will recognize the General Call Address (0x00). Table 30.4 shows
some example parameter settings and the slave addresses that will be recognized by hardware under
those conditions.
SFR Definition 30.3. SMB0ADR: SMBus Slave Address
SFR Address = 0xBA; SFR Page = F
Hardware Slave Address
SLV[6:0]
0x34
0x34
0x34
0x34
0x70
Name
Reset
Bit
7:1
Type
0
Bit
SLV[6:0]
Name
GC
7
0
Table 30.4. Hardware Address Recognition Examples (EHACK = 1)
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
6
0
Slave Address Mask
SLVM[6:0]
0x7F
0x7F
0x7E
0x7E
0x73
5
0
SLV[6:0]
R/W
Rev. 1.0
4
0
GC bit
0
1
0
1
0
Function
3
0
Slave Addresses Recognized by
Hardware
0x34
0x34, 0x00 (General Call)
0x34, 0x35
0x34, 0x35, 0x00 (General Call)
0x70, 0x74, 0x78, 0x7C
C8051F70x/71x
2
0
1
0
R/W
GC
0
0
229
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