C8051F338-GM Silicon Laboratories Inc, C8051F338-GM Datasheet - Page 194
C8051F338-GM
Manufacturer Part Number
C8051F338-GM
Description
IC MCU 16K FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Specifications of C8051F338-GM
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
24-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F336DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1427-5
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C8051F336/7/8/9
SFR Definition 24.9. TMR2RLL: Timer 2 Reload Register Low Byte
SFR Address = 0xCA
SFR Definition 24.10. TMR2RLH: Timer 2 Reload Register High Byte
SFR Address = 0xCB
SFR Definition 24.11. TMR2L: Timer 2 Low Byte
SFR Address = 0xCC
194
Name
Reset
Name
Reset
Name
Reset
7:0 TMR2RLL[7:0] Timer 2 Reload Register Low Byte.
7:0 TMR2RLH[7:0] Timer 2 Reload Register High Byte.
7:0
Bit
Bit
Bit
Type
Type
Type
Bit
Bit
Bit
TMR2L[7:0] Timer 2 Low Byte.
Name
Name
Name
7
0
7
0
7
0
In 16-bit mode, the TMR2L register contains the low byte of the 16-bit Timer 2. In 8-
bit mode, TMR2L contains the 8-bit low byte timer value.
TMR2RLL holds the low byte of the reload value for Timer 2.
TMR2RLH holds the high byte of the reload value for Timer 2.
6
0
6
0
6
0
5
0
5
0
5
0
Rev.1.0
TMR2RLH[7:0]
TMR2RLL[7:0]
4
0
4
0
4
0
TMR2L[7:0]
R/W
R/W
R/W
Function
Function
Function
3
0
3
0
3
0
2
0
2
0
2
0
1
0
1
0
1
0
0
0
0
0
0
0
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