C8051F564-IQ Silicon Laboratories Inc, C8051F564-IQ Datasheet - Page 283
![IC 8051 MCU 16K FLASH 32-QFP](/photos/12/16/121657/c8051f564-iq_sml.jpg)
C8051F564-IQ
Manufacturer Part Number
C8051F564-IQ
Description
IC 8051 MCU 16K FLASH 32-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F56xr
Specifications of C8051F564-IQ
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
32-QFP
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F560DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1702
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F564-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F564-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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26.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 26.1.
Where F
PCA0MD. The lower byte of the capture/compare module is compared to the PCA counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister. Note that the MATn bit should normally be set to 0 in this mode. If the MATn bit is set to 1, the CCFn
flag for the channel will be set when the 16-bit PCA0 counter and the 16-bit capture/compare register for
the channel are equal.
Note : A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
PCA0CPLn
Write to
Reset
PCA
PCA0CPHn
Write to
is the frequency of the clock selected by the CPS[2 : 0] bits in the PCA mode register,
0
ENB
ENB
1
PCA
Timebase
Figure 26.6. PCA High-Speed Output Mode Diagram
Enable
Equation 26.1. Square Wave Frequency Output
W
M
P
1
6
n
x
C
O
M
E
n
PCA0CPLn
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
A
P
N
n
16-bit Comparator
M
A
T
n
F
O
G
T
n
CEXn
W
P
M
n
0 x
E
C
C
F
n
PCA0CPHn
PCA0H
=
------------------------------------------ -
2 PCA0CPHn
Rev. 1.1
F
PCA
Match
Toggle
C8051F55x/56x/57x
C
F
C
R
TOGn
0
1
PCA0CN
C
C
F
5
C
C
F
4
0
1
C
C
F
3
CEXn
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
Crossbar
Port I/O
283
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