MC9S08AC16MBE Freescale Semiconductor, MC9S08AC16MBE Datasheet - Page 251

• Manufacturer Part Number: MC9S08AC16MBE
• Description: IC MCU 8BIT 16K FLASH 42SDIP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AC16MBE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Processor Series: S08AC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.4.2
The ADC1SC2 register is used to control the compare function, conversion trigger and conversion active
of the ADC module.
Freescale Semiconductor
ADTRG
ADACT
Field
1
7
6
Bits 1 and 0 are reserved bits that must always be written to 0.
Reset:
W
R
Status and Control Register 2 (ADC1SC2)
Conversion Active — ADACT indicates that a conversion is in progress. ADACT is set when a conversion is
initiated and cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
Conversion Trigger Select — ADTRG is used to select the type of trigger to be used for initiating a conversion.
Two types of trigger are selectable: software trigger and hardware trigger. When software trigger is selected, a
conversion is initiated following a write to ADC1SC1. When hardware trigger is selected, a conversion is initiated
following the assertion of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
ADACT
7
0
ADCH
01000
01001
01010
01011
01100
01101
01110
01111
= Unimplemented or Reserved
Figure 14-5. Status and Control Register 2 (ADC1SC2)
ADTRG
Table 14-4. ADC1SC2 Register Field Descriptions
0
6
Figure 14-4. Input Channel Select (continued)
MC9S08AC16 Series Data Sheet, Rev. 8
Input Select
ACFE
0
5
AD10
AD11
AD12
AD13
AD14
AD15
AD8
AD9
ACFGT
0
4
Description
0
0
3
Analog-to-Digital Converter (S08ADC10V1)
ADCH
11000
11001
11010
11011
11100
11101
11110
11111
0
0
2
R
0
1
1
Module disabled
Input Select
Reserved
V
V
AD24
AD25
AD26
AD27
REFH
REFL
R
0
0
1
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