Z8F3222AR020SG Zilog, Z8F3222AR020SG Datasheet - Page 123
Z8F3222AR020SG
Manufacturer Part Number
Z8F3222AR020SG
Description
IC ENCORE MCU FLASH 32K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F3222AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F322x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4261
Z8F3222AR020SG
Z8F3222AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F3222AR020SG
Manufacturer:
Zilog
Quantity:
40
Company:
Part Number:
Z8F3222AR020SG
Manufacturer:
Zilog
Quantity:
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PS019921-0308
UART Baud Rate Generator
Baud Rate Generator Interrupts
If the Baud Rate Generator interrupt enable is set, the UART Receiver interrupt asserts
when the UART Baud Rate Generator reloads. This action allows the Baud Rate Genera-
tor to function as an additional counter if the UART functionality is not employed.
The UART Baud Rate Generator creates a lower frequency baud rate clock for data trans-
mission. The input to the Baud Rate Generator is the system clock. The UART Baud Rate
High and Low Byte registers combine to create a 16-bit baud rate divisor value
Figure 17. UART Receiver Interrupt Service Routine Flow
Read Data
No
clears RDA bit and
Read Data which
resets error bits
Discard Data
Read Status
Receiver
Receiver
Interrupt
Ready
Errors?
Yes
Z8 Encore! XP
Product Specification
®
F64XX Series
UART
109
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