STM8L151C4T6 STMicroelectronics, STM8L151C4T6 Datasheet - Page 7
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STM8L151C4T6
Manufacturer Part Number
STM8L151C4T6
Description
IC MCU 8BIT 16KB FLASH 48LQFP
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Specifications of STM8L151C4T6
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 25x12b, D/A 1x12
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
STM8L15x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
41
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 25 Channel
On-chip Dac
12 bit, 1 Channel
For Use With
497-10594 - DEM FOR STM8L15X LOW PWR MODES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10517
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L151C4T6
Manufacturer:
STMicroelectronics
Quantity:
500
Company:
Part Number:
STM8L151C4T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM8L151C4T6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM8L151C4T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM8L151xx, STM8L152xx
List of figures
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Figure 47.
STM8L15xxx device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STM8L15x clock tree diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
STM8L151Gx UFQFPN 28 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STM8L151Gx WLCSP28 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STM8L151Kx 32-pin package pinout (without LCD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
STM8L152Kx 32-pin package pinout (with LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
STM8L151Cx 48-pin pinout (without LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
STM8L152Cx 48-pin pinout (with LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
POR/BOR thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Typ. IDD(RUN) vs. VDD, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Typ. IDD(Wait) vs. VDD, fCPU = 16 MHz 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Typ. IDD(LPR) vs. VDD (LSI clock source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Typ. IDD(LPW) vs. VDD (LSI clock source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
LSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Typical HSI frequency vs V
Typical LSI frequency vs. VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Typical VIL and VIH vs VDD (standard I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Typical VIL and VIH vs VDD (true open drain I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Typical pull-up resistance R
Typical pull-up current I
Typ. VOL @ VDD = 3.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typ. VOL @ VDD = 1.8 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typ. VOL @ VDD = 3.0 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typ. VOL @ VDD = 1.8 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typ. VDD - VOH @ VDD = 3.0 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typ. VDD - VOH @ VDD = 1.8 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Typical NRST pull-up resistance R
Typical NRST pull-up current I
Recommended NRST pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
SPI1 timing diagram - slave mode and CPHA=0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
SPI1 timing diagram - slave mode and CPHA=1
SPI1 timing diagram - master mode
Typical application with I2C bus and timing diagram 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
ADC1 accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Power supply and reference decoupling (V
Power supply and reference decoupling (VREF+ connected to VDDA) . . . . . . . . . . . . . . 106
UFQFPN28 – 28-lead very very thin fine pitch quad flat no-lead package outline (4 x 4) 111
Recommended footprint (dimensions in mm)
WLCSP28 – 28-pin wafer level chip scale package,
UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (5 x 5). . . . . 115
UFQFPN32 recommended footprint
LQFP32 – 32-pin low profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . 116
package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
pu
vs V
DD
PU
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Doc ID 15962 Rev 5
pu
DD
vs V
vs V
with VIN=VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
PU
DD
(1)
(1)
DD
vs V
with VIN=VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
DD
REF+
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
(1)
not connected to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
DDA
). . . . . . . . . . . . . 106
List of figures
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