AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 24

IC MCU 32BIT AVR32 196-CBGA

AT32AP7002-CTUT

Manufacturer Part Number
AT32AP7002-CTUT
Description
IC MCU 32BIT AVR32 196-CBGA
Manufacturer
Atmel
Series
AVR®32 AP7r
Datasheets

Specifications of AT32AP7002-CTUT

Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, LCD, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
196-CBGA
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
Maximum Clock Frequency
150 MHz
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 2 Channel
Package
196CTBGA
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32AP7002-CTUT
Manufacturer:
Atmel
Quantity:
10 000
7.4.3
7.4.4
7.5
7.6
32054FS–AVR32–09/09
External Interrupt Pin Mapping
Nexus OCD AUX port connections
SPIs
USBA
Each SPI can be connected to an internally divided clock:
Table 7-6.
OSC1 is connected to the USB HS Phy and must be 12 MHz when using the USBA.
External interrupt requests are connected to the following pins::
Table 7-7.
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the PIO configuration. Two different OCD trace pin mappings are possible,
depending on the configuration of the OCD AXS register. For details, see the AVR32 AP Techni-
cal Reference Manual.
Table 7-8.
SPI
0
1
Source
NMI_N
EXTINT0
EXTINT1
EXTINT2
EXTINT3
Pin
EVTI_N
MDO[5]
MDO[4]
MDO[3]
MDO[2]
MDO[1]
MDO[0]
EVTO_N
MCKO
MSEO[1]
MSEO[0]
SPI clock connections
External Interrupt Pin Mapping
Nexus OCD AUX port connections
Source
Internal
AXS=0
EVTI_N
PB09
PB08
PB07
PB06
PB05
PB04
PB03
PB02
PB01
PB00
Name
CLK_DIV
Connection
PB24
PB25
PB26
PB27
PB28
AXS=1
EVTI_N
PC18
PC14
PC12
PC11
PC06
PC05
PB28
PC02
PC01
PC00
AT32AP7002
Connection
clk_pba / 32
24

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