ATMEGA1280V-8AU Atmel, ATMEGA1280V-8AU Datasheet - Page 331
![IC MCU AVR 128K FLASH 100-TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA1280V-8AU
Manufacturer Part Number
ATMEGA1280V-8AU
Description
IC MCU AVR 128K FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA1280V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
86
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1280V-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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28.6.16
2549M–AVR–09/10
ATmega2560/2561 Boot Loader Parameters
Table 28-12. Explanation of different variables used in
Notes:
In
Self-Programming are given.
Table 28-13. Boot Size Configuration, ATmega2560/2561
Note:
Variable
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
Table 28-13
1
1
0
0
1. Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction.
2. See
3. The Z-register is only 16 bits wide. Bit 16 is located in the RAMPZ register in the I/O map.
1. The different BOOTSZ Fuse configurations are shown in
Z-pointer during Self-Programming.
1
0
1
0
ping to the Z-pointer, ATmega1280/1281
through
“Addressing the Flash During Self-Programming” on page 322
PC[15:7]
PC[6:0]
6
words
words
words
words
1024
2048
4096
512
Table 28-15 on page
Corresponding
Z-value
16
32
ATmega640/1280/1281/2560/2561
Z16
4
8
Z7:Z1
Z16
Z7
(3)
(3)
:Z8
(2)
0x00000 -
0x1FDFF
0x00000 -
0x1FBFF
0x00000 -
0x1F7FF
0x00000 -
0x1EFFF
332, the parameters used in the description of the
Description
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB +
1.
Program Counter page address: Page select, for
Page Erase and Page Write
Program Counter word address: Word select, for
filling temporary buffer (must be zero during Page
Write operation)
0x1FE00 -
0x1FFFF
0x1FC00 -
0x1FFFF
0x1F800 -
0x1FFFF
0x1F000 -
0x1FFFF
Figure 28-3 on page 322
(1)
(1)
Figure 28-2 on page
0x1FDFF
0x1FBFF
0x1F7FF
0x1EFFF
for details about the use of
and the map-
320.
0x1FE00
0x1FC00
0x1F800
0x1F000
331
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