DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet - Page 63
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DSPIC30F6012A-30I/PT
Manufacturer Part Number
DSPIC30F6012A-30I/PT
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6011A-30IPT.pdf
(234 pages)
3.DSPIC30F6011A-30IPT.pdf
(8 pages)
4.DSPIC30F6011A-30IPT.pdf
(10 pages)
5.DSPIC30F6011A-30IPT.pdf
(6 pages)
6.DSPIC30F6011A-30IPT.pdf
(8 pages)
7.DSPIC30F6011A-30IPT.pdf
(16 pages)
8.DSPIC30F6014A-20EPT.pdf
(238 pages)
Specifications of DSPIC30F6012A-30I/PT
Program Memory Type
FLASH
Program Memory Size
144KB (48K x 24)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
52
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F6012A30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6012A-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6012A-30I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
APPENDIX C:
Revision K (November 2010)
This version of the document includes the following
updates:
• Added Note three to
• Updated the first paragraph of
• Updated
• Removed the VARIANT bit and updated the bit
• Removed the VARIANT bit and updated the bit
• Updated Note 3 in
• Updated Step 11 in
• Updated Steps 5, 12 and 19 in
• Updated Steps 5, 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Entering ICSP™ Mode (see
• Updated Steps 4 and 11 in
• Renamed parameters: P12 to P12a and P13 to
© 2010 Microchip Technology Inc.
Note:
Enhanced ICSP Mode”
“Device ID”
definition for the DEVID register in
dsPIC30F Device ID Registers
field definition and description for the DEVID
register in
Mode”
Execution for BUlk Erasing Program Memory
(Only in Normal-voltage Systems)
Instruction Execution for Erasing Program
Memory (Either in Low-voltage or Normal-voltage
Systems)
Instruction Execution for Writing Configuration
Registers
Instruction Execution for Writing Code Memory
Instruction Execution for Writing Data EEPROM
Programming the Programming Executive
P13a, and added parameters P12b and P13b in
Table
13-1:
Table
Revision histories were not recorded for
revisions A through H. The previous
revision (J), was published in August
2007.
Table
AC/DC Characteristics
10-1: Device IDs
10-3:
Section 11.3 “Entering ICSP
Table
REVISION HISTORY
Section 5.2 “Entering
Device ID Bits Description
11-4:
Table
Table
Table
Table
Section 10.0
Table
Serial Instruction
11-8:
11-9:
12-1:
11-7:
Table
11-5:
Serial
Serial
Figure
Serial
10-2:
Serial
11-4)
DS70102K-page 63