PIC16LC74A-04I/L Microchip Technology, PIC16LC74A-04I/L Datasheet - Page 100
PIC16LC74A-04I/L
Manufacturer Part Number
PIC16LC74A-04I/L
Description
IC MCU OTP 4KX14 A/D PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16C72-04SO.pdf
(289 pages)
3.PIC16LC74A-04P.pdf
(8 pages)
Specifications of PIC16LC74A-04I/L
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Core
PIC
Processor Series
PIC16LC
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
192 B
Data Rom Size
192 B
On-chip Adc
Yes
Number Of Programmable I/os
33
Number Of Timers
3
Mounting Style
SMD/SMT
A/d Bit Size
8 bit
A/d Channels Available
8
Height
3.87 mm
Interface Type
I2C, SPI, USART
Length
16.59 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
6 V
Supply Voltage (min)
2.5 V
Width
16.59 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC74A-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16C7X
FIGURE 12-2: RCSTA: RECEIVE STATUS AND CONTROL REGISTER (ADDRESS 18h)
DS30390E-page 100
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
SPEN
SPEN: Serial Port Enable bit
1 = Serial port enabled (Configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)
0 = Serial port disabled
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode
Don’t care
Synchronous mode - master
1 = Enables single receive
0 = Disables single receive
This bit is cleared after reception is complete.
Synchronous mode - slave
Unused in this mode
CREN: Continuous Receive Enable bit
Asynchronous mode
1 = Enables continuous receive
0 = Disables continuous receive
Synchronous mode
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
Unimplemented: Read as '0'
FERR: Framing Error bit
1 = Framing error (Can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (Can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: 9th bit of received data (Can be parity bit)
R/W-0
RX9
R/W-0
SREN
R/W-0
CREN
U-0
—
FERR
R-0
OERR
R-0
RX9D
R-x
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n =Value at POR reset
1997 Microchip Technology Inc.
read as ‘0’
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