AT89C51CC03UA-S3SUM Atmel, AT89C51CC03UA-S3SUM Datasheet - Page 89
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AT89C51CC03UA-S3SUM
Manufacturer Part Number
AT89C51CC03UA-S3SUM
Description
IC 8051 MCU 64K FLASH 52-PLCC
Manufacturer
Atmel
Series
AT89C CANr
Datasheet
1.AT89C51CC03C-S3RIM.pdf
(198 pages)
Specifications of AT89C51CC03UA-S3SUM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
36
Number Of Timers
2
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
52PLCC
Device Core
8051
Family Name
AT89
Maximum Speed
60 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Error at Bit Level
Error Signalling
CAN Controller
Description
4182O–CAN–09/08
•
•
•
If one or more errors are discovered by at least one node using the above mechanisms,
the current transmission is aborted by sending an "error flag". This prevents other nodes
accepting the message and thus ensures the consistency of data throughout the net-
work. After transmission of an erroneous message that has been aborted, the sender
automatically re-attempts transmission.
The CAN Controller accesses are made through SFR.
Several operations are possible by SFR:
•
•
Any message object can be programmed in a reception buffer block (even non-consec-
utive buffers). For the reception of defined messages one or several receiver message
objects can be masked without participating in the buffer feature. An IT is generated
when the buffer is full. The frames following the buffer-full interrupt will not be taken into
account until at least one of the buffer message objects is re-enabled in reception.
Higher priority of a message object for reception or transmission is given to the lower
message object number.
The programmable 16-bit Timer (CANTIMER) is used to stamp each received and sent
message in the CANSTMP register. This timer starts counting as soon as the CAN con-
troller is enabled by the ENA bit in the CANGCON register.
The Time Trigger Communication (TTC) protocol is supported by the AT89C51CC03.
fields against the fixed format and the frame size. Errors detected by frame checks
are designated "format errors".
ACK Errors
As already mentioned frames received are acknowledged by all receivers through
positive acknowledgement. If no acknowledgement is received by the transmitter of
the message an ACK error is indicated.
Monitoring
The ability of the transmitter to detect errors is based on the monitoring of bus
signals. Each node which transmits also observes the bus level and thus detects
differences between the bit sent and the bit received. This permits reliable detection
of global errors and errors local to the transmitter.
Bit Stuffing
The coding of the individual bits is tested at bit level. The bit representation used by
CAN is "Non Return to Zero (NRZ)" coding, which guarantees maximum efficiency
in bit coding. The synchronization edges are generated by means of bit stuffing.
arithmetic and logic operations, transfers and program control (SFR is accessible by
direct addressing).
15 independent message objects are implemented, a pagination system manages
their accesses.
AT89C51CC03
89