ATXMEGA128A3-AU Atmel, ATXMEGA128A3-AU Datasheet - Page 30

• Manufacturer Part Number: ATXMEGA128A3-AU
• Description: MCU AVR 128K FLASH 1.8V 64-TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA128A3-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATXMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 2 Channel
• On-chip Dac: 2 bit, 1 Channel
• Package: 64TQFP
• Device Core: AVR
• Family Name: XMEGA
• Maximum Speed: 32 MHz
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.4
15.5
15.6
8068T–AVR–12/10
Input sensing
Port Interrupt
Alternate Port Functions
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•
•
•
Input sensing is synchronous or asynchronous depending on the enabled clock for the ports,
and the configuration is shown in
Figure 15-7. Input sensing system overview
When a pin is configured with inverted I/O, the pin value is inverted before the input sensing.
Each port has two interrupts with separate priority and interrupt vector. All pins on the port can
be individually selected as source for each of the interrupts. The interrupts are then triggered
according to the input sense configuration for each pin configured as source for the interrupt.
In addition to the input/output functions on all port pins, most pins have alternate functions. This
means that other modules or peripherals connected to the port can use the port pins for their
functions, such as communication or pulse-width modulation.
page 49
which alternate functions that are available on a pin.
Sense both edges
Sense rising edges
Sense falling edges
Sense low level
INVERTED I/O
Pn
shows which modules on peripherals that enable alternate functions on a pin, and
Synchronizer
D Q
R
INn
D Q
Figure 15-7 on page
R
Asynchronous sensing
Synchronous sensing
DETECT
DETECT
EDGE
EDGE
30.
”Pinout and Pin Functions” on
XMEGA A3
Interrupt
Control
IREQ
Event
30