PIC16LC74A-04/P Microchip Technology, PIC16LC74A-04/P Datasheet - Page 119
PIC16LC74A-04/P
Manufacturer Part Number
PIC16LC74A-04/P
Description
IC MCU OTP 4KX14 A/D PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16C72-04SO.pdf
(289 pages)
3.PIC16LC74A-04P.pdf
(8 pages)
Specifications of PIC16LC74A-04/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16LC74A-04/PR
PIC16LC74A-04/PR
PIC16LC74A-04/PR
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The ADRES register contains the result of the A/D con-
version. When the A/D conversion is complete, the
result is loaded into the ADRES register, the GO/DONE
bit (ADCON0<2>) is cleared, and A/D interrupt flag bit
ADIF is set. The block diagrams of the A/D module are
shown in Figure 13-3.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 13.1.
After this acquisition time has elapsed the A/D conver-
sion can be started. The following steps should be fol-
lowed for doing an A/D conversion:
1.
2.
FIGURE 13-3: A/D BLOCK DIAGRAM
1997 Microchip Technology Inc.
Note 1: Not available on PIC16C72/73/73A/76.
Configure the A/D module:
• Configure analog pins / voltage reference /
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
and digital I/O (ADCON1)
Converter
A/D
(Reference
voltage)
V
REF
(Input voltage)
PCFG2:PCFG0
V
IN
V
DD
001 or
011 or
101
000 or
010 or
100
3.
4.
5.
6.
7.
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result register (ADRES), clear bit
ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
CHS2:CHS0
111
110
101
100
011
010
001
000
AD
. A minimum wait of 2T
PIC16C7X
DS30390E-page 119
RA1/AN1
RE2/AN7
RA2/AN2
RA0/AN0
RE1/AN6
RE0/AN5
RA5/AN4
RA3/AN3/V
(1)
(1)
(1)
AD
REF
is
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