PIC18F4680-I/ML Microchip Technology, PIC18F4680-I/ML Datasheet - Page 469

• Manufacturer Part Number: PIC18F4680-I/ML
• Description: IC MCU FLASH 32KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11 bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

Data Memory ..................................................................... 67
DAW ................................................................................. 380
DC and AC Characteristics .............................................. 451
DC Characteristics ........................................................... 426
DCFSNZ .......................................................................... 381
DECF ............................................................................... 380
DECFSZ ........................................................................... 381
Development Support ...................................................... 411
Device Differences ........................................................... 461
Device Overview .................................................................. 7
Device Reset Timers .......................................................... 45
Direct Addressing ............................................................... 89
Disable Mode ................................................................... 324
E
ECAN Technology ........................................................... 273
© 2007 Microchip Technology Inc.
Access Bank .............................................................. 69
and the Extended Instruction Set ............................... 91
Bank Select Register (BSR) ....................................... 67
General Purpose Registers ........................................ 69
Map for PIC18F2X8X/4X8X ....................................... 68
Special Function Registers ........................................ 70
Power-Down and Supply Current ............................ 418
Supply Voltage ......................................................... 417
Features (table) ............................................................ 9
New Core Features ...................................................... 7
Oscillator Start-up Timer (OST) ................................. 45
PLL Lock Time-out ..................................................... 45
Power-up Timer (PWRT) ........................................... 45
Baud Rate Setting .................................................... 332
Bit Time Partitioning ................................................. 332
Bit Timing Configuration Registers .......................... 338
Calculating T
CAN Baud Rate Registers ....................................... 311
CAN Control and Status Registers .......................... 275
CAN Controller Register Map .................................. 319
CAN I/O Control Register ......................................... 314
CAN Interrupt Registers ........................................... 315
CAN Interrupts ......................................................... 339
CAN Message Buffers ............................................. 326
CAN Message Transmission ................................... 327
CAN Modes of Operation ......................................... 324
CAN Registers ......................................................... 275
and Nominal Bit Time ...................................... 335
Acknowledge ................................................... 341
Bus Activity Wake-up ....................................... 341
Bus-Off ............................................................. 341
Code Bits ......................................................... 340
Error ................................................................. 341
Message Error ................................................. 340
Receive ............................................................ 340
Receiver Bus Passive ...................................... 341
Receiver Overflow ........................................... 341
Receiver Warning ............................................ 341
Transmit ........................................................... 340
Transmitter Bus Passive .................................. 341
Transmitter Warning ........................................ 341
Dedicated Receive ........................................... 326
Dedicated Transmit .......................................... 326
Programmable Auto-RTR ................................ 327
Programmable Transmit/Receive .................... 326
Aborting ........................................................... 327
Initiating ........................................................... 327
Priority .............................................................. 328
Q
, Nominal Bit Rate
PIC18F2585/2680/4585/4680
Preliminary
ECCP1
Effect on Standard PIC Instructions ........................... 91, 408
Effects of Power Managed Modes on
Electrical Characteristics ................................................. 415
Enhanced Capture/Compare/PWM (ECCP1) .................. 173
Capture Mode. See Capture (ECCP1 Module).
PWM Mode. See PWM (ECCP1 Module).
Timer Resources ............................................................. 174
Enhanced PWM Mode. See PWM (ECCP1 Module).
Enhanced Universal Synchronous Receiver Transmitter
Configuration Mode ................................................. 324
Dedicated CAN Receive Buffer Registers ............... 287
Dedicated CAN Transmit Buffer Registers .............. 282
Disable Mode ........................................................... 324
Error Detection ........................................................ 338
Error Modes State (diagram) ................................... 339
Error Recognition Mode ........................................... 325
Filter-Mask Truth (table) .......................................... 330
Functional Modes .................................................... 325
Information Processing Time (IPT) .......................... 335
Lengthening a Bit Period ......................................... 337
Listen Only Mode ..................................................... 325
Loopback Mode ....................................................... 325
Message Acceptance Filters and Masks ......... 302, 330
Message Acceptance Mask
Message Reception ................................................. 329
Normal Mode ........................................................... 324
Oscillator Tolerance ................................................. 337
Overview .................................................................. 273
Phase Buffer Segments ........................................... 335
Programmable TX/RX and Auto-RTR Buffers ......... 294
Programming Time Segments ................................. 337
Propagation Segment .............................................. 335
Sample Point ........................................................... 335
Shortening a Bit Period ............................................ 337
Synchronization ....................................................... 336
Synchronization Segment ........................................ 335
Time Quanta ............................................................ 335
Values for ICODE (table) ......................................... 340
Capture and Compare Modes ................................. 174
Standard PWM Mode .............................................. 174
Various Clock Sources .............................................. 31
Outputs and Configuration ....................................... 174
Pin Configurations for ECCP1 ................................. 174
(EUSART). See EUSART.
Acknowledge ................................................... 338
Bit .................................................................... 338
CRC ................................................................. 338
Error Modes and Counters .............................. 338
Error States ..................................................... 338
Form ................................................................ 338
Stuff Bit ............................................................ 338
Mode 0 (Legacy Mode) .................................... 325
Mode 1 (Enhanced Legacy Mode) .................. 325
Mode 2 (Enhanced FIFO Mode) ...................... 326
and Filter Operation ......................................... 331
Enhanced FIFO Mode ..................................... 330
Priority ............................................................. 329
Time-Stamping ................................................ 330
Hard ................................................................. 336
Resynchronization ........................................... 336
Rules ............................................................... 336
DS39625C-page 467