PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 129
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PIC32MX360F512L-80I/PT
Manufacturer Part Number
PIC32MX360F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F032H-40IPT.pdf
(626 pages)
7.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX360F512L-80I/PT
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
No. Of Pwm Channels
5
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX360F512L-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX360F512L-80I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
25.0
This
PIC32MX3XX/4XX. The PIC32MX devices offer a total
of nine methods and modes that are organized into two
categories that allow the user to balance power con-
sumption with device performance. In all of the meth-
ods and modes described in this section, power-saving
is controlled by software.
25.1
When the CPU is running, power consumption can be
controlled by reducing the CPU clock frequency, lower-
ing the PBCLK, and by individually disabling modules.
These methods are grouped into the following modes:
• FRC Run mode: the CPU is clocked from the FRC
• LPRC Run mode: the CPU is clocked from the
• S
• Peripheral Bus Scaling mode: peripherals are
25.2
The device supports two power-saving modes, Sleep
and Idle, both of which halt the clock to the CPU. These
modes operate with all clock sources, as listed below:
• P
• FRC Idle Mode: the system clock is derived from
• S
© 2010 Microchip Technology Inc.
clock source with or without postscalers.
LPRC clock source.
S
clocked at programmable fraction of the CPU
clock (SYSCLK).
the P
operate.
Peripherals continue to operate, but can
optionally be individually disabled.
the FRC with or without postscalers. Peripherals
continue to operate, but can optionally be
individually disabled.
the S
can optionally be individually disabled.
Note 1: This data sheet summarizes the features
OSC
OSC
OSC
OSC
section
OSC
OSC
Run mode: the CPU is clocked from the
clock source.
Idle Mode: the system clock is derived from
Idle Mode: the system clock is derived from
2: Some registers and associated bits
POWER-SAVING FEATURES
Power-Saving with CPU Running
CPU Halted Methods
. The system clock source continues to
. Peripherals continue to operate, but
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 10. “Power-Saving Fea-
tures” (DS61130) of the “PIC32MX Fam-
ily Reference Manual”, which is available
from
(www.microchip.com/PIC32).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
describes
the
Microchip
power-saving
web
for
site
the
• LPRC Idle Mode: the system clock is derived from
• Sleep Mode: the CPU, the system clock source,
25.3
The purpose of all power-saving is to reduce power
consumption by reducing the device clock frequency.
To achieve this, low-frequency clock sources can be
selected. In addition, the peripherals and CPU can be
halted
consumption.
25.3.1
Sleep mode has the lowest power consumption of the
device Power-Saving operating modes. The CPU and
most peripherals are halted. Select peripherals can
continue to operate in Sleep mode and can be used to
wake the device from Sleep. See the individual periph-
eral module sections for descriptions of behavior in
Sleep mode.
Sleep mode includes the following characteristics:
• The CPU is halted.
• The system clock source is typically shut down.
• There can be a wake-up delay based on the
• The Fail-Safe Clock Monitor (FSCM) does not
• The BOR circuit, if enabled, remains operative
• The WDT, if enabled, is not automatically cleared
• Some peripherals can continue to operate in
• I/O pins continue to sink or source current in the
• The USB module can override the disabling of the
• Some modules can be individually disabled by
the LPRC.
Peripherals continue to operate, but can option-
ally be individually disabled. This is the lowest
power mode for the device with a clock running.
and any peripherals that operate from the system
clock source, are halted.
Some peripherals can operate in Sleep using spe-
cific clock sources. This is the lowest power mode
for the device.
See Section 25.3.2 “Idle Mode” for specific
information.
oscillator selection.
operate during Sleep mode.
during Sleep mode.
prior to entering Sleep mode.
Sleep mode. These peripherals include I/O pins
that detect a change in the input signal, WDT,
ADC, UART and peripherals that use an external
clock input or the internal LPRC oscillator, e.g.,
RTCC and Timer 1.
same manner as they do when the device is not in
Sleep.
P
The-Go (OTG)” for specific details.
software prior to entering Sleep in order to further
reduce consumption.
OSC
PIC32MX3XX/4XX
or FRC. Refer to Section 11.0 “USB On-
or
Power-Saving Operation
SLEEP MODE
disabled
to
further
DS61143G-page 129
reduce
power