PIC24FJ256GA110-I/PF Microchip Technology, PIC24FJ256GA110-I/PF Datasheet - Page 17
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PIC24FJ256GA110-I/PF
Manufacturer Part Number
PIC24FJ256GA110-I/PF
Description
IC PIC MCU FLASH 256K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA110-I/PF
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164323 - MODULE SKT FOR 100TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA110-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
3.3
As displayed in
mode requires three steps:
1.
2.
3.
The programming voltage applied to MCLR is V
which
PIC24FJXXXDA1/DA2/GB2/GA3 devices. There is no
minimum time requirement for holding at V
is removed, an interval of at least P18 must elapse
before presenting the key sequence on PGEDx.
FIGURE 3-4:
2010 Microchip Technology Inc.
MCLR
V
PGEDx
PGECx
DD
MCLR is briefly driven high, then low.
A 32-bit key sequence is clocked into PGEDx.
MCLR is then driven high within a specified
period and held.
is
Entering ICSP Mode
P6
essentially
Figure
3-4, entering ICSP Program/Verify
P14
ENTERING ICSP™ MODE
P18
V
DD
V
b31
IH
0
b30
in
1
PIC24FJXXXDA1/DA2/GB2/GA3
Program/Verify Entry Code = 4D434851h
the
b29
0
IH
b28
P1A
. After V
0
case
P1B
b27
1
IH
of
IH
...
,
b3
0
The key sequence is a specific 32-bit pattern:
‘0100 1101 0100 0011 0100 1000 0101 0001’
(more easily remembered as 4D434851h in hexa-
decimal). The device will enter Program/Verify mode only
if the sequence is valid. The Most Significant bit (MSb) of
the most significant nibble must be shifted in first.
Once the key sequence is complete, V
applied to MCLR and held at that level for as long as
Program/Verify mode is to be maintained. An interval of
at least time, P19 and P7, must elapse before present-
ing data on PGEDx. Signals appearing on PGECx
before P7 has elapsed will not be interpreted as valid.
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
ICSP mode, all unused I/Os are placed in the
high-impedance state.
b2
0
b1
0
V
IH
b0
1
P19
P7
DS39970B-page 17
IH
must be