PIC24FJ256GA110-I/PF Microchip Technology, PIC24FJ256GA110-I/PF Datasheet - Page 248
![IC PIC MCU FLASH 256K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24FJ256GA110-I/PF
Manufacturer Part Number
PIC24FJ256GA110-I/PF
Description
IC PIC MCU FLASH 256K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA110-I/PF
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164323 - MODULE SKT FOR 100TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA110-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA008-IPT PDF datasheet
- PIC24FJ128GA106-IPT PDF datasheet #2
- PIC24FJ128GA106-IPT PDF datasheet #3
- PIC24FJ128GA106-IPT PDF datasheet #4
- PIC24FJ256GA106-IPT PDF datasheet #5
- PIC24FJ128GB110-IPF PDF datasheet #6
- Current page: 248 of 330
- Download datasheet (3Mb)
PIC24FJ256GA110 FAMILY
REGISTER 25-2:
DS39905E-page 248
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 23-16
bit 15
bit 14-11
bit 10-8
bit 7-6
bit 5
bit 4
bit 3
bit 2
Note 1:
FCKSM1
R/PO-1
R/PO-1
R/PO-1
IESO
—
Implemented in 100-pin devices only; otherwise unimplemented, read as ‘1’.
Reserved
IESO: Internal External Switchover bit
1 = IESO mode (Two-Speed Start-up) enabled
0 = IESO mode (Two-Speed Start-up) disabled
Reserved
FNOSC<2:0>: Initial Oscillator Select bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
FCKSM<1:0>: Clock Switching and Fail-Safe Clock Monitor Configuration bits
1x = Clock switching and Fail-Safe Clock Monitor are disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
OSCIOFCN: OSCO Pin Configuration bit
If POSCMD<1:0> = 11 or 00:
1 = OSCO/CLKO/RC15 functions as CLKO (F
0 = OSCO/CLKO/RC15 functions as port I/O (RC15)
If POSCMD<1:0> = 10 or 01:
OSCIOFCN has no effect on OSCO/CLKO/RC15.
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = The IOLOCK bit (OSCCON<6>) can be set once, provided the unlock sequence has been
0 = The IOLOCK bit can be set and cleared as needed, provided the unlock sequence has been
Reserved
I2C2SEL: I2C2 Pin Select bit
1 = Use SCL2/SDA2 pins for I2C2
0 = Use ASCL2/ASDA2 pins for I2C2
FCKSM0
R/PO-1
R/PO-1
R/PO-1
completed. Once set, the Peripheral Pin Select registers cannot be written to a second time.
completed
—
—
CW2: FLASH CONFIGURATION WORD 2
PO = Program Once bit
OSCIOFCN
R/PO-1
R/PO-1
R/PO-1
—
—
(1)
IOL1WAY
R/PO-1
R/PO-1
R/PO-1
—
—
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
OSC
R/PO-1
R/PO-1
R/PO-1
—
—
—
/2)
I2C2SEL
FNOSC2
R/PO-1
R/PO-1
R/PO-1
—
(1)
2010 Microchip Technology Inc.
‘0’ = Bit is cleared
POSCMD1
FNOSC1
R/PO-1
R/PO-1
R/PO-1
—
POSCMD0
FNOSC0
R/PO-1
R/PO-1
R/PO-1
—
bit 16
bit 8
bit 0
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