PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 134

IC PIC MCU FLASH 512KX32 64-QFN

PIC32MX440F512H-80I/MR

Manufacturer Part Number
PIC32MX440F512H-80I/MR
Description
IC PIC MCU FLASH 512KX32 64-QFN
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, SPI, TWI, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC32MX3XX/4XX
REGISTER 26-2:
DS61143G-page 134
bit 15-14
bit 13-12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4-3
bit 2-0
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
FPBDIV<1:0>: Peripheral Bus Clock Divisor Default Value bits
11 = PBCLK is SYSCLK divided by 8
10 = PBCLK is SYSCLK divided by 4
01 = PBCLK is SYSCLK divided by 2
00 = PBCLK is SYSCLK divided by 1
Reserved: Write ‘1’
OSCIOFNC: CLKO Enable Configuration bit
1 = CLKO output signal active on the OSCO pin; primary oscillator must be disabled or configured for
0 = CLKO output disabled
POSCMOD<1:0>: Primary Oscillator Configuration bits
11 = Primary oscillator disabled
10 = HS oscillator mode selected
01 = XT oscillator mode selected
00 = External clock mode selected
IESO: Internal External Switchover bit
1 = Internal External Switchover mode enabled (Two-Speed Start-up enabled)
0 = Internal External Switchover mode disabled (Two-Speed Start-up disabled)
Reserved: Write ‘1’
FSOSCEN: Secondary Oscillator Enable bit
1 = Enable Secondary Oscillator
0 = Disable Secondary Oscillator
Reserved: Write ‘1’
FNOSC<2:0>: Oscillator Selection bits
111 = Fast RC Oscillator with divide-by-N (FRCDIV)
110 = FRCDIV16 Fast RC Oscillator with fixed divide-by-16 postscaler
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (S
011 = Primary Oscillator with PLL module (XT+PLL, HS+PLL, EC+PLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with divide-by-N with PLL module (FRCDIV+PLL)
000 = Fast RC Oscillator (FRC)
Note 1:
the External Clock mode (EC) for the CLKO to be active (POSCMOD<1:0> = 11 OR 00)
DEVCFG1: DEVICE CONFIGURATION WORD 1 (CONTINUED)
Do not disable P
OSC
OSC
(POSCMOD = 00) when using this oscillator source.
)
(1)
© 2010 Microchip Technology Inc.

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