PIC24FJ256GB110-I/PF Microchip Technology, PIC24FJ256GB110-I/PF Datasheet - Page 263

• Manufacturer Part Number: PIC24FJ256GB110-I/PF
• Description: IC PIC MCU FLASH 256K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB110-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 256KB (85.5K x 24)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 83
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 84
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.0
The programmable CRC generator offers the following
features:
• User-programmable polynomial CRC equation
• Interrupt output
• Data FIFO
The module implements a software configurable CRC
generator. The terms of the polynomial and its length
can
(CRCXOR<15:1>)
(CRCCON<3:0>), respectively.
FIGURE 21-1:
 2009 Microchip Technology Inc.
Note:
be
PROGRAMMABLE CYCLIC
REDUNDANCY CHECK (CRC)
GENERATOR
programmed
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section 30. “Programmable Cyclic
Redundancy Check (CRC)” (DS39714).
Shift Clock (2F
and
Family
CRC BLOCK DIAGRAM
using
CY
the
)
Reference
the
PLEN<3:0>
X<15:1>
Manual”,
PIC24FJ256GB110 FAMILY
CRC Shift Engine
(8x16 or 16x8)
Variable FIFO
CRCWDAT
bits
bits
CRCDAT
Consider the CRC equation:
To program this polynomial into the CRC generator,
the CRC register bits should be set as shown in
Table 21-1.
TABLE 21-1:
Note that for the value of X<15:1>, the 12th bit and the
5th bit are set to ‘1’, as required by the equation. The
0 bit required by the equation is always XORed. For a
16-bit polynomial, the 16th bit is also always assumed
to be XORed; therefore, the X<15:1> bits do not have
the 0 bit or the 16th bit.
A simplified block diagram of the module is shown in
Figure 21-1. The general topology of the shift engine is
shown in Figure 21-2.
PLEN<3:0>
Bit Name
X<15:1>
FIFO Empty Event
EXAMPLE CRC SETUP
x
16
+ x
12
000100000010000
+ x
5
Bit Value
Set CRCIF
+ 1
1111
DS39897C-page 263