PIC18LF248-I/SO Microchip Technology, PIC18LF248-I/SO Datasheet - Page 5
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PIC18LF248-I/SO
Manufacturer Part Number
PIC18LF248-I/SO
Description
IC MCU CAN FLASH 8K 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF248-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.4
Figure 2-5 shows the high level overview of the pro-
gramming process. First, a bulk erase is performed.
Next, the code memory, ID locations, and data
EEPROM are programmed. These memories are then
verified to ensure that programming was successful. If
no errors are detected, the configuration bits are then
programmed and verified.
2.5
The High Voltage ICSP Program/Verify mode is
entered by holding SCLK and SDATA low, and then
raising MCLR/V
mode, the code memory, data EEPROM, ID locations,
and
programmed in serial fashion.
The sequence that enters the device into the Program-
ming/Verify mode places all unused I/Os in the high
impedance state.
2.5.1
When the LVP configuration bit is ‘1’ (see Section 5.3),
the Low Voltage ICSP mode is enabled. Low Voltage
ICSP Program/Verify mode is entered by holding SCLK
and SDATA low, placing a logic high on PGM, and then
raising MCLR/V
pin is dedicated to the programming function and
ceases to be a general purpose I/O pin.
The sequence that enters the device into the Program-
ming/Verify mode places all unused I/Os in the high
impedance state.
FIGURE 2-4:
2010 Microchip Technology Inc.
MCLR/V
V
SDATA
SCLK
configuration
DD
High Level Overview of the
Programming Process
Entering High Voltage ICSP
Program/Verify Mode
D110
ENTERING LOW VOLTAGE ICSP
PROGRAM/VERIFY MODE
PP
PP
PP
to V
to V
SDATA = Input
bits
P13
ENTERING HIGH
VOLTAGE PROGRAM/
VERIFY MODE
IHH
IH
. In this mode, the RB5/PGM
(high voltage). Once in this
can
P12
be
accessed
and
FIGURE 2-5:
FIGURE 2-6:
MCLR/V
PGM
SDATA
SCLK
V
DD
PP
V
PIC18FXX2/XX8
IH
Configuration Bits
Configuration Bits
V
Program Memory
SDATA = Input
Verify Program
IH
Program Data
P15
HIGH LEVEL
PROGRAMMING FLOW
Perform Bulk
ENTERING LOW VOLTAGE
PROGRAM/ VERIFY MODE
Program IDs
Verify Data
Verify IDs
Program
Erase
Verify
Done
Start
P12
DS39576C-page 5