PIC18F442-I/L Microchip Technology, PIC18F442-I/L Datasheet - Page 2

• Manufacturer Part Number: PIC18F442-I/L
• Description: IC MCU FLASH 8KX16 EE A/D 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F442-I/L

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Package: 44PLCC
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT44L2 - SOCKET TRAN ICE 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F442I/L

PIC18FXX2
3. Module: Data EEPROM
EXAMPLE 1:
DS80122K-page 2
BCF
BSF
MOVF
BSF
When reading the data EEPROM, the contents of
the EEDATA register may become corrupted in the
second instruction cycle after the RD bit
(EECON1<0>) is set. The actual contents of the
EEPROM remains unaffected.
Work around
To ensure the integrity of the contents of EEDATA,
the register must be read in the instruction imme-
diately following the setting of the RD bit. Use the
MOVF or MOVFF instructions to do this (see
Example 1).
Additionally, all interrupts must be disabled prior to
the read instruction sequence. Interruptions of the
sequence may have the same result of altering the
contents of EEDATA.
Date Codes that pertain to this issue:
All engineering and production devices.
•
•
•
•
INTCON,GIEH ;disable interrupts
EECON1,RD
EEDATA,W
INTCON,GIEH ;enable interrupts
SUGGESTED SEQUENCE
FOR READING EEDATA
;if using interrupts
;start the read operation
;move the data out of
;EEDATA
;if using interrupts
4. Module: Interrupts
Note:
Under certain conditions, the use of dual priority
interrupts may cause a program instruction to be
skipped entirely. This has only been observed
when both of the following apply:
• Both high and low interrupts are enabled, and
• A high priority asynchronous interrupt occurs in
The event causes the stack to get pushed twice,
and will eventually result in an overflow.
Work around
Two possible solutions are presented. Other
solutions may exist.
1. Enable only high priority interrupts for all
2. If it is necessary to use both high and low
Date Codes that pertain to this issue:
All engineering and production devices.
the following cycle after any low priority
interrupts.
sources, both synchronous and asynchronous.
interrupt priorities:
• Assign asynchronous interrupts as low
• Assign synchronous interrupts to both high
priority only.
and low priority, as needed.
This does not apply to the INT0 (external)
interrupt as it is always configured as a
high priority interrupt.
© 2005 Microchip Technology Inc.