PIC24FJ128GA110-I/PF Microchip Technology, PIC24FJ128GA110-I/PF Datasheet - Page 9

• Manufacturer Part Number: PIC24FJ128GA110-I/PF
• Description: IC PIC MCU FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA110-I/PF

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Controller Family/series: PIC24
• No. Of I/o's: 85
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 85
• Interface Type: I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

26. Module: Output Compare
27. Module: Interrupts (INTx)
 2010 Microchip Technology Inc.
In PWM mode, the output compare module may
miss a compare event when the current duty cycle
register (OCxRS) value is 0000h (0% duty cycle)
and the OCxRS register is updated with a value of
0001h. The compare event is only missed the first
time a value of 0001h is written to OCxRS and the
PWM output remains low for one PWM period.
Subsequent PWM high and low times occur as
expected.
Work around
If the current OCxRS register value is 0000h, avoid
writing a value of 0001h to OCxRS. Instead, write
a value of 0002h. In this case, however, the duty
cycle will be slightly different from the desired
value.
Affected Silicon Revisions
Writing to the INTCON2 register may cause an
external interrupt event (inputs on INT0 through
INT4) to be missed. This only happens when the
interrupt event and the write event occur during
the same clock cycle.
Work around
If possible, do not write to INTCON2 while any of
the external interrupts are enabled.
If this cannot be avoided, write the data intended
for INTCON2 to any other register in the inter-
rupt block of the SFR (addresses, 0080h to
00E0h); then write the data to INTCON2.
Be certain to write the data to a register not
being actively used by the application, or to any
of the interrupt flag registers, in order to avoid
spurious interrupts. For example, if the inter-
rupts controlled by IEC5 are not being used in
the application, the code sequence would be:
IEC5 = 0x1E;
INTCON2 = 0x1E;
IEC5 = 0;
It is the user’s responsibility to determine an
appropriate register for the particular application.
Affected Silicon Revisions
A3
A3
X
X
A5
A5
X
PIC24FJ256GA110 FAMILY
28. Module: A/D Converter
Once
(AD1CON1<15> = 1), it may continue to draw
extra current even if the module is later disabled
(AD1CON1<15> = 0).
Work around
In addition to disabling the module through the
ADON bit, set the corresponding PMD bit
(ADC1MD,
completely.
Disabling the A/D module through the PMD regis-
ter also disables the AD1PCFG registers, which in
turn, affects the state of any port pins with analog
inputs. Users should consider the effect on I/O
ports and other digital peripherals on those ports
when ADC1MD is used for power conservation.
Affected Silicon Revisions
A3
X
A5
X
the
PMD1<0>)
A/D
module
to
power
DS80368J-page 9
is
enabled
it
down