PIC16C77-04/P Microchip Technology, PIC16C77-04/P Datasheet - Page 264

• Manufacturer Part Number: PIC16C77-04/P
• Description: IC MCU OTP 8KX14 A/D PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C77-04/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 368Byte
• Cpu Speed: 4MHz
• No. Of Timers: 3
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel
• Data Rom Size: 368 B
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 6 V
• Supply Voltage (min): 4 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16C7X
APPENDIX C: WHAT’S NEW
Added the following devices:
• PIC16C76
• PIC16C77
Removed the PIC16C710, PIC16C71, PIC16C711
from this datasheet.
Added PIC16C76 and PIC16C77 devices. The
PIC16C76/77 devices have 368 bytes of data memory
distributed in 4 banks and 8K of program memory in 4
pages. These two devices have an enhanced SPI that
supports both clock phase and polarity. The USART
has been enhanced.
When upgrading to the PIC16C76/77 please note that
the upper 16 bytes of data memory in banks 1,2, and 3
are mapped into bank 0. This may require relocation of
data memory usage in the user application code.
Added Q-cycle definitions to the Instruction Set Sum-
mary section.
DS30390E-page 264
APPENDIX D: WHAT’S CHANGED
Minor changes, spelling and grammatical changes.
Added the following note to the USART section. This
note applies to all devices except the PIC16C76 and
PIC16C77.
For the PIC16C73/73A/74/74A the asynchronous high
speed mode (BRGH = 1) may experience a high rate of
receive errors. It is recommended that BRGH = 0. If you
desire a higher baud rate than BRGH = 0 can support,
refer to the device errata for additional information or
use the PIC16C76/77.
Divided SPI section into SPI for the PIC16C76/77 and
SPI for all other devices.
1997 Microchip Technology Inc.