PIC18F2580-I/ML Microchip Technology, PIC18F2580-I/ML Datasheet - Page 359
![IC PIC MCU FLASH 16KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F2580-I/ML
Manufacturer Part Number
PIC18F2580-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F4480-IPT.pdf
(490 pages)
3.PIC18F4480-IPT.pdf
(8 pages)
4.PIC18F4480-IPT.pdf
(6 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F2580-ESO.pdf
(483 pages)
Specifications of PIC18F2580-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2580-I/ML
Manufacturer:
Microchi
Quantity:
1 064
- PIC18F2221-ISO PDF datasheet
- PIC18F4480-IPT PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18F4480-IPT PDF datasheet #4
- PIC18F4480-IPT PDF datasheet #5
- PIC18F2580-ESO PDF datasheet #6
- Current page: 359 of 483
- Download datasheet (9Mb)
24.5
The overall structure of the code protection on the
PIC18 Flash devices differs significantly from other
PIC
The user program memory is divided into five blocks.
One of these is a boot block of 2 Kbytes. The remainder
of the memory is divided into four blocks on binary
boundaries.
FIGURE 24-5:
© 2007 Microchip Technology Inc.
®
devices.
000000h
0007FFh
000800h
000FFFh
001000h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
008000h
1FFFFFh
Address
Range
BBSIZ
Program Verification and
Code Protection
Unimplemented
Boot Block
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
1 KW
3 KW
4 KW
4 KW
4 KW
CODE-PROTECTED PROGRAM MEMORY FOR PIC18F2480/2580/4480/4580
0
(PIC18F2580/4580)
32 Kbytes
Unimplemented
Boot Block
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
MEMORY SIZE/DEVICE
2 KW
2 KW
4 KW
4 KW
4 KW
1
PIC18F2480/2580/4480/4580
Unimplemented
Preliminary
Boot Block
Read ‘0’s
Block 0
Block 1
1 KW
3 KW
4 KW
0
(PIC18F2480/4480)
16 Kbytes
Each of the five blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
Figure 24-5 shows the program memory organization
for 16 and 32-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 24-3.
Unimplemented
Boot Block
Read ‘0’s
Block 0
Block 1
2 KW
2 KW
4 KW
1
(Unimplemented Memory Space)
Block Code Protection
CPB, WRTB, EBRTB
CP3, WRT3, EBTR3
CP0, WRT0, EBRT0
CP2, WRT2, EBRT2
CP!, WRT1, EBRT1
Controlled by:
(Boot Block)
(Block 0)
(Block 1)
(Block 2)
(Block 3)
DS39637C-page 357
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