PIC16LF877-04/P Microchip Technology, PIC16LF877-04/P Datasheet - Page 23
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PIC16LF877-04/P
Manufacturer Part Number
PIC16LF877-04/P
Description
IC MCU FLASH 8KX14 EE A/D 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F873-04SO.pdf
(218 pages)
Specifications of PIC16LF877-04/P
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16LF
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
4MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF877-04/P
Manufacturer:
MICROCHIP
Quantity:
5
Company:
Part Number:
PIC16LF877-04/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC16LF877-04/PT
Manufacturer:
MICROCHIP
Quantity:
5 320
Company:
Part Number:
PIC16LF877-04/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LF877-04/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.2.2.4
The PIE1 register contains the individual enable bits for
the peripheral interrupts.
REGISTER 2-4:
2001 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIE1 Register
PIE1 REGISTER (ADDRESS 8Ch)
PSPIE
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Note 1: PSPIE is reserved on PIC16F873/876 devices; always maintain this bit clear.
bit 7
Legend:
R = Readable bit
- n = Value at POR
PSPIE
R/W-0
(1)
(1)
: Parallel Slave Port Read/Write Interrupt Enable bit
R/W-0
ADIE
R/W-0
RCIE
W = Writable bit
’1’ = Bit is set
R/W-0
TXIE
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
SSPIE
R/W-0
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
CCP1IE
R/W-0
PIC16F87X
x = Bit is unknown
TMR2IE
R/W-0
DS30292C-page 21
TMR1IE
R/W-0
bit 0