PIC18LF2610-I/SP Microchip Technology, PIC18LF2610-I/SP Datasheet
PIC18LF2610-I/SP
Specifications of PIC18LF2610-I/SP
Related parts for PIC18LF2610-I/SP
PIC18LF2610-I/SP Summary of contents
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... Note 1: The I C™ interface does not conform to the 400 kHz I 100 kHz) in all details, but may be used with care where higher rates are required by the application. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 1. Module: MSSP In its current implementation, the I the anomalies ...
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... Section 15.4.7 “Enhanced PWM Auto-Shutdown” of the Device Data Sheet. A logic high-voltage level on FLT0 will generate a shutdown on ECCP1. Work around None. Date Codes that pertain to this issue: All engineering and production devices. ECCP1AS, W WREG, ECCPASE SHUTDOWN_ROUTINE © 2007 Microchip Technology Inc. ...
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... V is detected above 2.0V. DD Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 9. Module: A/D The A/D offset is greater than the specified limit in Table 25-24 of the Device Data Sheet. The updated conditions and limits are shown in bold text in Table 2 ...
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... PWM cycle. This may generate unexpected short pulses on the modulated outputs. Work around Disable the PWM or set duty cycle to zero prior to switching directions. Date Codes that pertain to this issue: and All engineering and production devices. In other words, if © 2007 Microchip Technology Inc. ...
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... TMRxL and TMRxH. Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 20. Module: Timer1/Timer3 When Timer1 or Timer3 is in External Clock Synchronized mode and the external clock period ...
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... MOVWF BSR instead of MOVFF TEMP, BSR another alternative, the following work around shown in Example 2 can be used. This example overwrites the Fast Return register by making a dummy call to Foo with the fast option in the high priority service routine. © 2007 Microchip Technology Inc. ...
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... LowVector (void) { _asm goto MyLowISR _endasm } #pragma code /* return to default code section */ © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 then the interrupt is treated as high priority in spite directive. The code segment shown in Example 3 ® ...
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... Example 4. This example illustrates how it reduces the instruction cycle count from 10 cycles to 3: EXAMPLE 4: #pragma code high_vector_section=0x8 void high_vector (void) { _asm CALL high_vector_branch, 1 _endasm } void high_vector_branch (void) { _asm POP GOTO high_isr _endasm } #pragma interrupt high_isr void high_isr (void) { ... } DS80199E-page 8 © 2007 Microchip Technology Inc. ...
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... Work around Use pull-up resistor on TX pin. Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 28. Module: MSSP system with multiple slave nodes, an unaddressed slave may respond to bus activity when data on the bus matches its address ...
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... MOVWF RXDATA ;Save in user RAM MOVF TXDATA TXDATA BCF T2CON, TMR2ON ;Timer2 off CLRF TMR2 ;Clear Timer2 MOVWF SSPBUF ;Xmit New data BSF T2CON, TMR2ON ;Timer2 on Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc ...
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... TXREG. Do not load the TXREG when timer is about to overflow. Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 35. Module: EUSART In 9-Bit Asynchronous Full-Duplex Receive mode, the received data may be corrupted if the TX9D bit (TXSTA< ...
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... While keeping the LAT bits clear, configure SCL and SDA as inputs by setting their TRIS bits. Once this is done, use the SSPCON1 and SSPCON2 registers to configure the proper I mode as before. Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc operation ...
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... Q4 cycle). Work around None Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2515/2610/4515/4610 44. Module: 10-Bit Analog-to-Digital (A/D) Converter Module When the A/D clock source is selected (when ADCS2:ADCS0 = 000 or x11), in ...
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... Counter). Added Example 4 in issue 23 (Interrupts). Added issues 34-37 (EUSART), 38 (Timer1), 39-42 (MSSP) and 43 (Reset). Added information to new issues from revision C (issues 24-33). Rev E Document (8/2007) Added silicon issue 44 (10-Bit A/D Converter). Corrected device IDs. DS80199E-page 14 19-21 Date Code © 2007 Microchip Technology Inc. ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...