ATMEGA329P-20MU Atmel, ATMEGA329P-20MU Datasheet - Page 4

• Manufacturer Part Number: ATMEGA329P-20MU
• Description: IC MCU 32K 4X25 LCD CTRL 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329P-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA329P-16MU; ATMEGA329P-16MU

2. Overview
2.1
Figure 2-1.
8021GS–AVR–03/11
AREF
AVCC
AGND
GND
Block Diagram
Block Diagram
VCC
ON-CHIP DEBUG
PROGRAMMING
BOUNDARY-
JTAG TAP
The ATmega329P/3290P is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega329P/3290P achieves throughputs approaching 1MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
The Atmel
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two inde-
pendent registers to be accessed in one single instruction executed in one clock cycle. The
LOGIC
SCAN
DATA REGISTER
DATA REGISTER
USART
PORTE
PORTF
AVR CPU
PORTF DRIVERS
PORTE DRIVERS
®
PF0 - PF7
PE0 - PE7
AVR
INSTRUCTION
INSTRUCTION
PROGRAM
PROGRAM
REGISTER
COUNTER
CONTROL
DECODER
SERIAL INTERFACE
FLASH
LINES
ADC
REG. PORTE
®
REG. PORTF
UNIVERSAL
DATA DIR.
DATA DIR.
core combines a rich instruction set with 32 general purpose working registers.
DATA REGISTER
REGISTERS
REGISTER
GENERAL
PURPOSE
POINTER
STATUS
STACK
SRAM
PORTB
DATA REGISTER
ALU
X
Y
Z
PORTA
PORTB DRIVERS
PB0 - PB7
PORTA DRIVERS
PA0 - PA7
REG. PORTB
DATA DIR.
REG. PORTA
DATA DIR.
MCU CONTROL
OSCILLATOR
WATCHDOG
INTERRUPT
COUNTERS
INTERNAL
REGISTER
EEPROM
TIMER/
TIMER
UNIT
SPI
8-BIT DATA BUS
DATA REGISTER
PORTD
DATA REGISTER
PORTD DRIVERS
PD0 - PD7
PORTC
ATmega329P/3290P
OSCILLATOR
TIMING AND
CALIB. OSC
CONTROL
PORTC DRIVERS
REG. PORTD
PC0 - PC7
DATA DIR.
REG. PORTC
DATA DIR.
CONTROLLER/
DRIVER
LCD
DATA REG.
PORTG
PORTG DRIVERS
PG0 - PG4
REG. PORTG
DATA DIR.
4