ATMEGA329-16AU Atmel, ATMEGA329-16AU Datasheet - Page 260

IC AVR MCU 32K 16MHZ 64TQFP

ATMEGA329-16AU

Manufacturer Part Number
ATMEGA329-16AU
Description
IC AVR MCU 32K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA329-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
54
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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25.6.5
260
ATmega329/3290/649/6490
Scanning the ADC
Table 25-4.
Figure 25-9
Boundary-scan cell from
used for pure connectivity testing, since all analog inputs are shared with a digital port pin as
well.
Figure 25-9. Analog to Digital Converter
The signals are described briefly in
Signal
Name
AC_IDLE
ACO
ACME
ACBG
NEGSEL_2
NEGSEL_1
NEGSEL_0
MUXEN_7
MUXEN_6
MUXEN_5
MUXEN_4
MUXEN_3
MUXEN_2
MUXEN_1
MUXEN_0
EXTCH
ADC_7
ADC_6
ADC_5
ADC_4
ADC_3
ADC_2
ADC_1
ADC_0
ADC_2
ADC_1
ADC_0
shows a block diagram of the ADC with all relevant control and observe signals. The
Direction as
Seen from the
Comparator
input
output
input
input
Boundary-scan Signals for the Analog Comparator
SCTEST
AMPEN
ACLK
ST
Figure 25-5
To Comparator
Description
Comparator when
true
Analog
Comparator Output
from ADC mux
when true
Reference enable
Turns off Analog
Uses output signal
Bandgap
+
-
1x
Table
ADCBGEN
is attached to each of these signals. The ADC need not be
VCCREN
IREFEN
AREF
25-5.
PASSEN
ACTEN
1.22V
GNDEN
ref
Recommended
Input when Not
in Use
1
Will become
input to µC code
being executed
0
0
1.11V
ref
PRECH
DAC_9..0
ADCEN
HOLD
Output Values when
Recommended
Inputs are Used
Depends upon µC
code being executed
0
Depends upon µC
code being executed
Depends upon µC
code being executed
PRECH
AREF
10-bit DAC
AREF
+
-
2552K–AVR–04/11
DACOUT
COMP
COMP

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