PIC18F4610-I/P Microchip Technology, PIC18F4610-I/P Datasheet - Page 35

• Manufacturer Part Number: PIC18F4610-I/P
• Description: IC MCU FLASH 32KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4610-I/P

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3968 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Data Rom Size: 3968 B
• Height: 3.81 mm
• Length: 52.26 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 13.84 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 3-1:
FIGURE 3-2:
3.2.3
In RC_RUN mode, the CPU and peripherals are
clocked from the internal oscillator block using the
INTOSC multiplexer. In this mode, the primary clock is
shut down. When using the INTRC source, this mode
provides the best power conservation of all the Run
modes, while still executing code. It works well for user
applications which are not highly timing sensitive or do
not require high-speed clocks at all times.
If the primary clock source is the internal oscillator
block (either INTRC or INTOSC), there are no
distinguishable differences between PRI_RUN and
RC_RUN modes during execution. However, a clock
switch delay will occur during entry to and exit from
RC_RUN mode. Therefore, if the primary clock source
is the internal oscillator block, the use of RC_RUN
mode is not recommended.
© 2009 Microchip Technology Inc.
Note 1: Clock transition typically occurs within 2-4 T
Peripheral
Program
Counter
T1OSI
Note 1: T
OSC1
Clock
Clock
CPU Clock
RC_RUN MODE
CPU
PLL Clock
Peripheral
Program
Counter
Output
T1OSI
OSC1
Clock
2: Clock transition typically occurs within 2-4 T
Q1
SCS1:SCS0 bits changed
OST
Q2
TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE
TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)
PC
= 1024 T
Q3
Q4
Q1
OSC
Q1
; T
T
1
OST (1)
PLL
PC
= 2 ms (approx). These intervals are not shown to scale.
2
Q2
Clock Transition
OSTS bit set
3
T
Q3
PLL (1)
OSC
(1)
PC + 2
Q4
n-1
.
OSC
.
This mode is entered by setting SCS1 to ‘1’. Although
it is ignored, it is recommended that SCS0 also be
cleared; this is to maintain software compatibility with
future devices. When the clock source is switched to
the INTOSC multiplexer (see Figure 3-3), the primary
oscillator is shut down and the OSTS bit is cleared. The
IRCF bits may be modified at any time to immediately
change the clock speed.
n
Q1
1
Note:
Transition
2
Clock
PIC18F2X1X/4X1X
n-1 n
(2)
Q2
Caution should be used when modifying a
single IRCF bit. If V
possible to select a higher clock speed
than is supported by the low V
Improper device operation may result if
the V
PC + 2
DD
Q3
/F
Q2
OSC
Q4
Q3 Q4
specifications are violated.
Q1
Q1
DD
PC + 4
Q2
is less than 3V, it is
Q2
PC + 4
DS39636D-page 37
Q3
Q3
DD
.