PIC18F252-I/SP Microchip Technology, PIC18F252-I/SP Datasheet - Page 121
PIC18F252-I/SP
Manufacturer Part Number
PIC18F252-I/SP
Description
IC MCU FLASH 16KX16 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18F452-EP.pdf
(332 pages)
Specifications of PIC18F252-I/SP
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
23
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC18F252-I/SPG
PIC18F252-I/SPG
PIC18F252I/SP
PIC18F252-I/SPG
PIC18F252I/SP
Available stocks
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Price
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Quantity:
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- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18F452-EP PDF datasheet #7
- Current page: 121 of 332
- Download datasheet (6Mb)
14.3
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 or TMR3 registers when an
event occurs on pin RC2/CCP1. An event is defined as
one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set; it must be
cleared in software. If another capture occurs before the
value in register CCPR1 is read, the old captured value
is overwritten by the new captured value.
14.3.1
In Capture mode, the RC2/CCP1 pin should be
configured as an input by setting the TRISC<2> bit.
14.3.2
The timers that are to be used with the capture feature
(either Timer1 and/or Timer3) must be running in Timer
mode or Synchronized Counter mode. In Asynchro-
nous Counter mode, the capture operation may not
work. The timer to be used with each CCP module is
selected in the T3CON register.
FIGURE 14-1:
Note:
2002 Microchip Technology Inc.
Capture Mode
If the RC2/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
CCP PIN CONFIGURATION
TIMER1/TIMER3 MODE SELECTION
CCP1 pin
CCP2 pin
CAPTURE MODE OPERATION BLOCK DIAGRAM
Q’s
Edge Detect
Edge Detect
Q’s
Prescaler
Prescaler
1, 4, 16
1, 4, 16
and
and
CCP1CON<3:0>
CCP2CON<3:0>
Set Flag bit CCP2IF
Set Flag bit CCP1IF
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP2
T3CCP2
14.3.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit, CCP1IF, following any such
change in Operating mode.
14.3.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
RESET will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 14-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 14-1:
CLRF
MOVLW
MOVWF
NEW_CAPT_PS ; Load WREG with the
CCP1CON
CCP1CON, F ; Turn CCP module off
SOFTWARE INTERRUPT
CCP PRESCALER
TMR1
Enable
TMR1
Enable
TMR3
Enable
TMR3
Enable
CCPR1H
CCPR2H
TMR1H
TMR1H
TMR3H
TMR3H
CHANGING BETWEEN
CAPTURE PRESCALERS
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
PIC18FXX2
CCPR1L
CCPR2L
TMR3L
TMR1L
TMR3L
TMR1L
DS39564B-page 119
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