PIC18F4550-I/ML Microchip Technology, PIC18F4550-I/ML Datasheet - Page 116
![IC PIC MCU FLASH 16KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4550-I/ML
Manufacturer Part Number
PIC18F4550-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
7.PIC18F4550-IP.pdf
(430 pages)
Specifications of PIC18F4550-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
EAUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPADXLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PCM18XR1 PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2455-ISO PDF datasheet #4
- PIC18F2455-ISO PDF datasheet #5
- PIC18F2455-ISO PDF datasheet #6
- PIC18F4550-IP PDF datasheet #7
- Current page: 116 of 438
- Download datasheet (7Mb)
PIC18F2455/2550/4455/4550
TABLE 10-1:
DS39632E-page 114
RA0/AN0
RA1/AN1
RA2/AN2/
V
RA3/AN3/
V
RA4/T0CKI/
C1OUT/RCV
RA5/AN4/SS/
HLVDIN/C2OUT
OSC2/CLKO/
RA6
Legend:
REF
REF
-/CV
+
Pin
REF
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Function
HLVDIN
C1OUT
C2OUT
PORTA I/O SUMMARY
CV
V
T0CKI
OSC2
CLKO
V
RCV
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
RA5
AN4
RA6
REF
REF
SS
REF
+
-
Setting
TRIS
0
1
1
0
1
1
0
1
1
1
x
0
1
1
1
0
1
1
0
x
0
1
1
1
1
0
x
x
0
1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
I/O Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
TTL
DIG
DIG
DIG
TTL
ST
ST
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input enabled.
A/D Input Channel 0 and Comparator C1- input. Default configuration
on POR; does not affect digital output.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; reads ‘0’ on POR.
A/D Input Channel 1 and Comparator C2- input. Default configuration
on POR; does not affect digital output.
LATA<2> data output; not affected by analog input. Disabled when
CV
PORTA<2> data input. Disabled when analog functions enabled;
disabled when CV
A/D Input Channel 2 and Comparator C2+ input. Default configuration
on POR; not affected by analog output.
A/D and comparator voltage reference low input.
Comparator voltage reference output. Enabling this feature disables
digital I/O.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input enabled.
A/D Input Channel 3 and Comparator C1+ input. Default configuration
on POR.
A/D and comparator voltage reference high input.
LATA<4> data output; not affected by analog input.
PORTA<4> data input; disabled when analog input enabled.
Timer0 clock input.
Comparator 1 output; takes priority over port data.
External USB transceiver RCV input.
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input enabled.
A/D Input Channel 4. Default configuration on POR.
Slave select input for MSSP module.
High/Low-Voltage Detect external trip point input.
Comparator 2 output; takes priority over port data.
Main oscillator feedback output connection (all XT and HS modes).
System cycle clock output (F
INTCKO modes.
LATA<6> data output. Available only in ECIO, ECPIO and INTIO
modes; otherwise, reads as ‘0’.
PORTA<6> data input. Available only in ECIO, ECPIO and INTIO
modes; otherwise, reads as ‘0’.
REF
output enabled.
REF
output enabled.
Description
OSC
/4); available in EC, ECPLL and
© 2009 Microchip Technology Inc.
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