PIC18F2439-I/SO Microchip Technology, PIC18F2439-I/SO Datasheet - Page 18
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PIC18F2439-I/SO
Manufacturer Part Number
PIC18F2439-I/SO
Description
IC MCU FLASH 6KX16 EE A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
4.PIC18F2439-ISO.pdf
(34 pages)
Specifications of PIC18F2439-I/SO
Core Size
8-Bit
Program Memory Size
12KB (6K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
21
Eeprom Memory Size
256Byte
Ram Memory Size
640Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2439-I/SO
Manufacturer:
Microchip Technology
Quantity:
135
PIC18FXX39
3.5
The ID locations are programmed much like the code
memory, except that multi-panel writes must be
disabled.
automatically be enabled, based on the value of the
Table Pointer. The ID registers are mapped in
addresses 200000h through 200007h. These locations
read out normally, even after code protection.
TABLE 3-7:
DS30480C-page 18
Step 1: Configure device for single panel writes.
Step 2: Direct access to code memory.
Step 3: Load write buffer. Panel will be automatically determined by address.
4-bit Command
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
ID Location Programming
The single panel that will be written will
0E 3C
6E F8
0E 00
6E F7
0E 06
6E F6
00 00
8E A6
9C A6
0E 20
6E F8
0E 00
6E F7
0E 00
6E F6
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
00 00
WRITE ID SEQUENCE
Data Payload
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 06h
MOVWF TBLPTRL
Write 00h to 3C0006h to enable single panel writes.
BSF EECON1, EEPGD
BCF EECON1, CFGS
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and start programming
NOP - hold SCLK high for time P9
Preliminary
Table 3-7 demonstrates the code sequence required to
write the ID locations.
Note:
Core Instruction
For single panel programming, the user
must still fill the 8-byte data buffer for the
panel.
2010 Microchip Technology Inc.