ATMEGA16-16AU Atmel, ATMEGA16-16AU Datasheet - Page 19

IC AVR MCU 16K 16MHZ 5V 44TQFP

ATMEGA16-16AU

Manufacturer Part Number
ATMEGA16-16AU
Description
IC AVR MCU 16K 16MHZ 5V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ATmega16(L) Rev.
I
2466TS–AVR–07/10
4. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
1. First Analog Comparator conversion may be delayed
2. Interrupts may be lost when writing the timer registers in the asynchronous timer
3. IDCODE masks data from TDI input
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request
Problem Fix / Workaround
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
If the device is powered by a slow rising V
take longer than expected on some devices.
Problem Fix/Workaround
When the device has been powered or reset, disable then enable theAnalog Comparator
before the first conversion.
The interrupt will be lost if a timer register that is synchronized to the asynchronous timer
clock is written when the asynchronous Timer/Counter register(TCNTx) is 0x00.
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register(TCCRx), asynchronous
Timer Counter Register(TCNTx), or asynchronous Output Compare Register(OCRx).
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
Problem Fix / Workaround
If ATmega16 is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega16 by issuing the IDCODE instruction or
by entering the Test-Logic-Reset state of the TAP controller to read out the contents
of its Device ID Register and possibly data from succeeding devices of the scan
chain. Issue the BYPASS instruction to the ATmega16 while reading the Device ID
Registers of preceding devices of the boundary scan chain.
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega16 must be the fist device in the chain.
If ATmega16 is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega16 by issuing the IDCODE instruction or
by entering the Test-Logic-Reset state of the TAP controller to read out the contents
of its Device ID Register and possibly data from succeeding devices of the scan
chain. Issue the BYPASS instruction to the ATmega16 while reading the Device ID
Registers of preceding devices of the boundary scan chain.
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega16 must be the fist device in the chain.
CC
, the first Analog Comparator conversion will
ATmega16(L)
19

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