PIC24FJ64GB108-I/PT Microchip Technology, PIC24FJ64GB108-I/PT Datasheet - Page 6
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PIC24FJ64GB108-I/PT
Manufacturer Part Number
PIC24FJ64GB108-I/PT
Description
IC PIC MCU FLASH 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ64GB108-I/PT
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
65
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC24
No. Of I/o's
65
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GB108-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC24FJ256GB110 FAMILY
15. Module: UART (IrDA)
16. Module: UART (IrDA)
17. Module: I
DS80369K-page 6
When the UART is operating in 8-bit mode
(PDSEL<1:0> = 0x) and using the IrDA endec
(IREN = 1), a framing error may occur when
transmitting a data payload of 00h.
Work around:
None.
Affected Silicon Revisions
When the UART is operating in 9-bit mode
(PDSEL<1:0> = 1x) and using the IrDA endec
(IREN = 1), the module will incorrectly transmit
10 bits when transmitting data payloads of 00h or
80h.
Work around:
None.
Affected Silicon Revisions
Under certain circumstances, a module operating
in Master mode may Acknowledge its own com-
mand addressed to a slave device. This happens
when the following occurs:
• 10-Bit Addressing mode is used (A10M = 1)
• The I
In these cases, the Master also Acknowledges the
address command and generates an erroneous I
slave interrupt, as well as the I
Work around
Several options are available:
• When using 10-Bit Addressing mode, make
A3
A3
X
X
address bits (I2CADD<9:8>) as the addressed
slave module
certain that the master and slave devices do not
share the same 2 MSbs of their addresses.
2
A5
A5
C Master has the same two upper
2
C™ Module (Master Mode)
2
C master interrupt.
2
C
18. Module: I
If this cannot be avoided:
• Clear the A10M bit (I2CxCON<10> = 0) prior to
• Read the ADD10 bit (I2CxSTAT<8>) to check
Affected Silicon Revisions
Under certain circumstances, a module operating
in Slave mode, may not respond correctly to some
of the special addresses reserved by the I
protocol. This happens when the following occurs:
• 10-Bit Addressing mode is used (A10M = 1)
• Bits, A<7:1>, of the slave address
In these cases, the Slave module Acknowledges
the command and triggers an I
does not copy the data into the I2CxRCV register
or set the RBF bit.
Work around
Do not set bits, A<7:1>, of the module’s slave
address equal to ‘1111xxx’ or ‘0000xxx’.
Affected Silicon Revisions
A3
A3
performing a Master mode transmit.
for a full 10-bit match whenever a slave I
interrupt occurs on the master module.
X
(I2CADD<7:1>) fall into the range of the
reserved 7-bit address ranges: ‘1111xxx’ or
‘0000xxx’.
X
A5
A5
2
C Module (Slave Mode)
2010 Microchip Technology Inc.
2
C slave interrupt; it
2
C
2
C